TDA5250D2 Datasheet, PDF (25/97 Pages) Infineon Technologies AG – ASK/FSK 868MHz Wireless Transceiver

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TDA 5250 D2
preliminary
Functional Description
Start Condition (STA):
A start condition is defined by a HIGH to LOW transition of the BusData line
while BusCLK is HIGH. This start condition must precede any command and
initiate a data transfer onto the bus.
Stop Condition (STO):
A stop condition is defined by a LOW to HIGH transition of the BusData line
while BusCLK is HIGH. This condition terminates the communication between
the devices and forces the bus interface into the initial state.
Acknowledge (ACK):
Indicates a successful data transfer. The transmitter will release the bus after
sending 8 bit of data. During the 9th clock cycle the receiver will set the SDA
line to LOW level to indicate it has received the 8 bits of data correctly.
Data Transfer Write Mode:
To start the communication, the bus master must initiate a start condition (STA),
followed by the 8bit chip address. The chip address for the TDA5250 is fixed as
„1110000“ (MSB at first). The last bit (LSB=A0) of the chip address byte defines
the type of operation to be performed:
A0=0, a write operation is selected and A0=1 a read operation is selected.
After this comparison the TDA5250 will generate an ACK and awaits the
desired sub address byte (00H...0FH) and data bytes. At the end of the data
transition the master has to generate the stop condition (STO).
Data Transfer Read Mode:
To start the communication in the read mode, the bus master must initiate a
start condition (STA), followed by the 8 bit chip address (write: A0=0), followed
by the sub address to read (80H, 81H), followed by the chip address
(read: A0=1). After that procedure the data of the selected register (80H, 81H)
is read out. During this time the data line has to be kept in HIGH state and the
chip sends out the data. At the end of data transition the master has to generate
the stop condition (STO).
Wireless Components
3 - 15
Specification, July 2002