HYB39S256400DT Datasheet, PDF (5/22 Pages) Infineon Technologies AG – 256 MBit Synchronous DRAM

HYB39S256400/800/160DT(L)/DC(L)
256MBit Synchronous DRAM
Pinout for x4, x8 & x16 organised 256M-DRAMs
C olum n Address
C o un ter
C olum n Addresses
A 0 - A 9 , A 1 1 , A P,
BA0, BA1
C olum n Address
B uffer
R ow Addresses
A0 - A12,
BA0, BA1
R ow Address
B u ffe r
R efresh C ounter
Row
D ecoder
Mem ory
A rray
Bank 0
8196
x 2048
x 4 Bit
R ow
Decoder
M em ory
A rray
Bank 1
8192
x 2048
x 4 Bit
Row
D ecoder
M em ory
A rray
Bank 2
8192
x 2048
x 4 Bit
R ow
D ecoder
M em ory
A rray
Bank 3
8192
x 2048
x 4 B it
In p ut B u ffe r O u tp u t B uffe r
DQ0 - DQ3
C ontrol Logic &
Tim ing G enerator
S PB 04127_2
Block Diagram for 64M x 4 SDRAM ( 13 / 11 / 2 addressing)
INFINEON Technologies
5
2002-04-23