HYS64T32000GU Datasheet, PDF (47/67 Pages) Infineon Technologies AG – 240-Pin Unbuffered DDR2 SDRAM Modules

HYS[64T[3200/6400/12802]0/72T[6400/12802]0][G/H]U–[3.7/5]–A
512 Mbit DDR2 SDRAM
SPD Codes
Table 27 SPD Codes for HYS[64/72]T32000GU–5–A
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte# Description
0
Programmed SPD Bytes in EEPROM
1
Total number of Bytes in EEPROM
2
Memory Type (DDR2)
3
Number of Row Addresses
4
Number of Column Addresses
5
DIMM Rank and Stacking Information
6
Data Width
7
Not used
8
Interface Voltage Level
9
t_CK @ CL_max (Byte 18) [ns]
10
t_AC SDRAM @ CL_max (Byte 18) [ns]
11
Error Correction Support (non-ECC, ECC)
12
Refresh Rate and Type
13
Primary SDRAM Width
14
Error Checking SDRAM Width
15
Not used
16
Burst Length Supported
17
Number of Banks on SDRAM Device
18
Supported CAS Latencies
19
Not used
20
DIMM Type Information
21
DIMM Attributes
22
Component Attributes
23
t_CK @ CL_max -1 (Byte 18) [ns]
24
t_AC SDRAM @ CL_max -1 [ns]
25
t_CK @ CL_max -2 (Byte 18) [ns]
26
t_AC SDRAM @ CL_max -2 [ns]
27
t_RP.min [ns]
Data Sheet
47
256 MB
512 MB
×64
×64
1 Rank (×16) 1 Rank (×8)
PC2–3200U–333
Rev. 1.1
Rev. 1.1
HEX
HEX
80
80
08
08
08
08
0D
0E
0A
0A
60
60
40
40
00
00
05
05
50
50
60
60
00
00
82
82
10
08
00
00
00
00
0C
0C
04
04
38
38
00
00
02
02
00
00
01
01
50
50
60
60
50
50
60
60
3C
3C
512 MB
×72
1 Rank (×8)
Rev. 1.1
HEX
80
08
08
0E
0A
60
48
00
05
50
60
02
82
08
08
00
0C
04
38
00
02
00
01
50
60
50
60
3C
Rev. 0.87, 2004-06
09122003-GZEK-H4J6