HYS64T32000GU Datasheet, PDF (36/67 Pages) Infineon Technologies AG – 240-Pin Unbuffered DDR2 SDRAM Modules

HYS[64T[3200/6400/12802]0/72T[6400/12802]0][G/H]U–[3.7/5]–A
512 Mbit DDR2 SDRAM
SPD Codes
Table 24 SPD Codes HYS[64/72]T128020GU–3.7–A (cont’d)
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
Description
27
t_RP.min [ns]
28
t_RRD.min [ns]
29
t_RCD.min [ns]
30
t_RAS.min [ns]
31
Module Density per Rank
32
t_AS.min and t_CS.min [ns]
33
t_AH.min and t_CH.min [ns]
34
t_DS.min [ns]
35
t_DH.min [ns]
36
t_WR.min [ns]
37
t_WTR.min [ns]
38
t_RTP.min [ns]
39
Analysis Characteristics
40
t_RC and t_RFC Extension
41
t_RC.min [ns]
42
t_RFC.min [ns]
43
t_CK.max [ns]
44
t_DQSQ.max [ns]
45
t_QHS.max [ns]
46
PLL Relock Time
47
T_CASE.max Delta / ∆ T_4R4W Delta
48
Psi(T-A) DRAM
49
∆T₀ (DT0)
50
∆T_2N (DT2N, UDIMM) or ∆T_{2Q (} (DT2Q, RDIMM)
51
∆T_2P (DT2P)
52
∆T_3N (DT3N)
53
∆T_3P.fast (DT3P fast)
54
∆T_3P.slow (DT3P slow)
Data Sheet
36
1 GByte
×64
2 Ranks (×8)
PC2–4200U–444
Rev. 1.1
HEX
3C
1E
3C
2D
80
25
37
10
22
3C
1E
1E
00
00
3C
69
80
1E
28
00
51
78
3E
2E
1E
1E
24
17
1 GByte
×72
2 Ranks (×8)
Rev. 1.1
HEX
3C
1E
3C
2D
80
25
37
10
22
3C
1E
1E
00
00
3C
69
80
1E
28
00
51
78
3E
2E
1E
1E
24
17
Rev. 0.87, 2004-06
09122003-GZEK-H4J6