HYS64T32000GU Datasheet, PDF (29/67 Pages) Infineon Technologies AG – 240-Pin Unbuffered DDR2 SDRAM Modules

HYS[64T[3200/6400/12802]0/72T[6400/12802]0][G/H]U–[3.7/5]–A
512 Mbit DDR2 SDRAM
Electrical Characteristics & AC Timings
Table 21 AC Timing - Absolute Specifications –5 / –3.7
Symbol Parameter
–5
DDR2–400
min.
max.
t_REFI
Average Periodic Refresh
0^οC - 85^οC
-
7.8
Interval
85^οC - 95^οC -
3.9
t_RFC
Auto-refresh to Active/Auto-refresh command 105
-
period
t_RP
t_RPRE
t_RPST
t_RRD
Precharge command period
15
Read preamble
0.9
Read postamble
0.40
Active bank A to Active bank B x8
7.5
command
(1k page size)
-
1.1
0.60
-
x16
10
-
(2k page size)
t_RTP
Internal read to precharge command delay
7.5
-
–3.7
DDR2–533
min. max.
-
7.8
-
3.9
105
-
15
-
0.9
1.1
0.40 0.60
7.5
-
10
-
7.5
-
Unit Notes
µs ¹⁾
1)
ns ¹⁾
ns ¹⁾
t_CK ¹⁾
t_CK ¹⁾
ns ¹⁾
ns ¹⁾
ns ¹⁾
1)
t_QH
t_QHS
t_WPRE
t_WPST
t_WR
t_WTR
t_XARD
Data Output hold time from DQS
Data hold skew factor
Write preamble
Write postamble
Write recovery time
Internal write to read command delay
Exit power down to any valid command
(other than NOP or Deselect)
t_HP - t_QHS -
-
450
0.25
-
0.40
0.60
15
-
10
-
2
-
t_HP-t_QHS -
-
400
0.25 -
0.40 0.60
15
-
7.5
-
2
-
1)
ps ¹⁾
t_CK ¹⁾
t_CK ¹⁾
ns ¹⁾
ns ¹⁾
t_CK ¹⁾
t_XARDS Exit active power-down mode to read command 6 - AL -
(slew exit, lower power)
6 - AL -
t_CK ¹⁾
t_XP
Exit precharge power-down to any valid
2
-
2
-
t_CK ¹⁾
command (other than NOP or Deselect)
t_XSNR Exit Self-Refresh to non-read command
t_RFC + 10 -
t_RFC + -
10
ns ¹⁾⁵⁾
t_XSRD Exit Self-Refresh to read command
200
-
200
-
t_CK ¹⁾⁶⁾
1) For details and notes see the relevant INFINEON component datasheet
2) CL = 3
3) CL = 4 & 5
4) Timing definition and values for t_IS, t_IH, t_DS and t_DH may change due to actual JEDEC work. This may also effect the SPD
code for these parameters
5) 0 °C ≤ T_CASE ≤ 85 °C
6) 85 °C < T_CASE ≤ 95 °C
Data Sheet
29
Rev. 0.87, 2004-06
09122003-GZEK-H4J6