HYS64T32000GDL Datasheet, PDF (40/48 Pages) Infineon Technologies AG – 200-Pin Small Outline Dual-In-Line Memory Module

HYS64T[32000/64020/128021][G/H]DL–[3.7/5]–A
512 Mbit DDR2 SDRAM
SPD Codes
Table 21 SPD Codes for HYS64T128021[G/H]DL
Product Type
Organization
1 GByte
1 GByte
×64
×64
2 Ranks (×8)
2 Ranks (×8)
Label Code
PC2–4200S–444 PC2–4200S–444
JEDEC SPD Revision
Rev. 1.1
Rev. 1.1
Byte# Description
HEX
HEX
36
t_WR.min [ns]
3C
3C
37
t_WTR.min [ns]
1E
1E
38
t_RTP.min [ns]
1E
1E
39
Analysis
00
00
Characteristics
40
t_RC and t_RFC Extension 00
00
41
t_RC.min [ns]
3C
3C
42
t_RFC.min [ns]
69
69
43
t_CK.max [ns]
80
80
44
t_DQSQ.max [ns]
1E
1E
45
t_QHS.max [ns]
28
28
46
PLL Relock Time
00
00
47
T_CASE.max Delta /
51
51
∆T_4R4W Delta
48
Psi(T-A) DRAM
78
78
49
∆T₀ (DT0)
3E
3E
50
∆T_2N (DT2N, UDIMM) 2E
2E
or ∆T_{2Q (} (DT2Q,
RDIMM)
51
∆T_2P (DT2P)
1E
1E
52
∆T_3N (DT3N)
1E
1E
53
∆T_3P.fast (DT3P fast) 24
24
54
∆T_3P.slow (DT3P slow) 17
17
55
∆T_4R (DT4R) / ∆T_4R4W 34
34
S ^{Sign (DT4R4W)}
56
∆T_5B (DT5B)
1E
1E
57
∆T₇ (DT7)
20
20
58
Psi(ca) PLL
00
00
59
Psi(ca) REG
00
00
1 GByte
1 GByte
×64
×64
2 Ranks (×8)
2 Ranks (×8)
PC2–3200S–444 PC2–3200S–444
Rev. 1.1
Rev. 1.1
HEX
HEX
3C
3C
28
28
1E
1E
00
00
00
00
3C
3C
69
69
80
80
23
23
2D
2D
00
00
51
51
78
78
32
32
24
24
1E
1E
1B
1B
1E
1E
17
17
28
28
1B
1B
1E
1E
00
00
00
00
Data Sheet
40
Rev. 0.91, 2004-06
09122003-FTXN-KM26