HYS64T32000GDL Datasheet, PDF (18/48 Pages) Infineon Technologies AG – 200-Pin Small Outline Dual-In-Line Memory Module

HYS64T[32000/64020/128021][G/H]DL–[3.7/5]–A
512 Mbit DDR2 SDRAM
Electrical Characteristics
3
Electrical Characteristics
Table 9 Absolute Maximum Ratings
Parameter
Voltage on any pins relative to V_SS
Voltage on V_DD relative to V_SS
Voltage on V_{DD Q} relative to V_SS
Barometric Pressure (operating & storage)
Storage Humidity (without condensation)
Symbol
V_IN, V_OUT
V_DD
V_DDQ
H_STG
Limit Values
Min.
Max.
– 0.5
2.3
– 1.0
2.3
– 0.5
2.3
+69
+105
5
95
Unit
V
V
kPa
%
Note/Test
Condition
1)
1)
1)
1)
1)
1) Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
Table 10 Operating Temperature Range
Parameter
Symbol
Limit Values Unit Notes
min.
max.
DIMM Module Operating Temperature Range (ambient)
DRAM Component Case Temperature Range
Storage temperature
Barometric Pressure (operating & storage)
T_OPR
T_CASE
T_STG
0
0
– 55
+69
+65
+95
+100
+105
°C
°C
°C
kPa
1)2)3)4)
5)
Operating Humidity (relative)
H_OPR
10
90
%
1) DRAM Component Case Temperature is the surface temperature in the center on the top side of any of the DRAMs. For
measurement conditions, please refer to the JEDEC document JESD51-2
2) Within the DRAM Component Case Temperature Range all DRAM specifications will be supported
3) Above 85 °C DRAM case temperature the Auto-Refresh command interval has to be reduced to t_REFI = 3.9 µs.
4) Self-Refresh period is hard-coded in the DRAMs and therefore it is imperative that the system ensures the DRAM is below
85 °C case temperature before initiating self-refresh operation.
5) Up to 3000 m.
Table 11 Supply Voltage Levels and DC Operating Conditions
Parameter
Symbol Limit Values
Unit Notes
Min.
Nom.
Max.
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
V_DD
V_DDQ
V_REF
1.7
1.8
1.9
V
1.7
1.8
1.9
V
1)
0.49 × V_DDQ 0.5 × V_DDQ
0.51 × V_DDQ V
2)
SPD Supply Voltage
DC Input Logic High
V_DDSPD
V_{IH (DC)}
1.7
—
V_REF + 0.125 —
3.6
V
V_DDQ +0.3
V
DC Input Logic Low
V_{IL (DC)}
– 0.30
—
In / Output Leakage Current I_L
–5
—
V_REF –0.125 V
5
µA
3)
1) Under all conditions, V_DDQ must be less than or equal to V_DD
2) Peak to peak AC noise on V_REF may not exceed ± 2% V_REF (DC). V_REF is also expected to track noise variations in V_DDQ.
3) For any pin on the DIMM connector under test input of 0 V ≤ V_IN ≤ V_DDQ + 0.3 V.
Data Sheet
18
Rev. 0.91, 2004-06
09122003-FTXN-KM26