HYS64D16301HU-5-C Datasheet, PDF (24/35 Pages) Infineon Technologies AG – 184-Pin Unbuffered Dual-In-Line Memory Modules

HYS[64/72]D[16x01/32x00/64x20]HU-[5/6]-C
Unbuffered DDR SDRAM Modules
SPD Contents
4
SPD Contents
Table 12 SPD Codes for PC2700 Modules “–6”
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Description
Programmed SPD Bytes in 128
E2PROM
Total number of Bytes in 256
E2PROM
Memory Type DDR-I = 07h DDR SDRAM
# of Row Addresses
13
# Number of Column
9/10
Addresses
# of DIMM Banks
1/2
Data Width (LSB)
× 64/× 72
Data Width (MSB)
0
Interface Voltage Levels SSTL_2.5
tCK @ CLmax (Byte 18) [ns] 6 ns
tAC SDRAM @ CLmax
(Byte 18) [ns]
0.75 ns
DIMM Configuration Type non-ECC/ECC
(non- / ECC)
Refresh Rate
Self-Refresh 7.8 µs
Primary SDRAM width
× 16/ × 8
Error Checking SDRAM
width
na/ × 8
tCCD [cycles]
Burst Length Supported
t_CCD = 1 CLK
2, 4 & 8
Number of Banks on
4
SDRAM
CAS Latency
CAS latency = 2 & 2.5
CS Latency
CS latency = 0
WE (Write) Latency
Write latency = 1
DIMM Attributes
unbuffered
128MB 256MB 256MB 512MB 512MB
× 64 × 64 × 72 × 64 × 72
1 Rank 1 Rank 1 Rank 2Ranks 2Ranks
–6
–6
–6
–6
–6
HEX HEX HEX HEX HEX
80
80
80
80
80
08
08
08
08
08
07
07
07
07
07
0D
0D
0D
0D
0D
09
0A
0A
0A
0A
01
01
01
02
02
40
40
48
40
48
00
00
00
00
00
04
04
04
04
04
60
60
60
60
60
70
70
70
70
70
00
00
02
00
02
82
82
82
82
82
10
08
08
08
08
00
00
08
00
08
01
01
01
01
01
0E
0E
0E
0E
0E
04
04
04
04
04
0C
0C
0C
0C
0C
01
01
01
01
01
02
02
02
02
02
20
20
20
20
20
Data Sheet
24
V1.0, 2003-07