HYB39S256400D Datasheet, PDF (21/28 Pages) Infineon Technologies AG – 256-MBit Synchronous DRAM

HYB39S256[40/80/16]0D[C/T](L)
256-MBit Synchronous DRAM
Electrical Characteristics
Table 12 Input and Output Capacitances¹⁾
Parameter
Symbol Values²⁾
Unit
min.
max.
Input Capacitances: CK, CK
Input Capacitance
(A0-A12, BA0, BA1, RAS, CAS, WE, CS, CKE, DQM)
C_I1
2.5
3.5
pF
C_I2
2.5
3.8
pF
Input/Output Capacitance (DQ)
C_I0
4.0
6.0
pF
1) TA = 0 to 70 °C; VDD,VDDQ = 3.3 V ± 0.3 V, f = 1 MHz
2) Capacitance values are shown for TSOP-54 packages. Capacitance values for TFBGA packages are lower by 0.5 pF
Table 13 I_DD Conditions
Parameter
Operating Current
One bank active, Burst length = 1
Precharge Standby Current in Power Down Mode
Precharge Standby Current in Non-Power Down Mode
No Operating Current
active state ( max. 4 banks)
Burst Operating Current
Read command cycling
Auto Refresh Current
Auto Refresh command cycling
Self Refresh Current (standard components)
Self Refresh Mode, CKE=0.2V, t_CK=infinity
Self Refresh Current (low power components)
Self Refresh Mode, CKE=0.2V, t_CK=infinity
Symbol
I_DD1
I_DD2P
I_DD2N
I_DD3N
I_DD3P
I_DD4
I_DD5
I_DD6
Data Sheet
21
Rev. 1.02, 2004-02
10072003-13LE-FGQQ