TC1791 Datasheet, PDF (137/153 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1791
Electrical ParametersAC Parameters
Table 39 MLI Transmitter (cont’d)
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
TDATA/TVALID output t₁₅ CC -3
−
delay time
4.4 ns
TREADY setup time
t₁₆ SR 18
−
−
ns
before TCLK rising edge
TREADY hold time after t₁₇ SR -2
−
−
ns
TCLK rising edge
1) The following formula is valid: t11 + t12 = t10.
2) The min./max. TCLK low/high times t11/t12 include the PLL jitter of fSYS. Fractional divider settings must be
regarded additionally to t11 / t12.
3) For high-speed MLI interface, strong driver sharp or medium edge selection (class A2 pad) is recommended
for TCLK.
5.3.9 Micro Second Channel (MSC) Interface Timing
The MSC parameters are vaild for C_L = 50 pF.
Table 40 MSC Parameters
Parameter
Symbol
Values
FCLP clock period¹⁾²⁾
t₄₀ CC
SOP⁴⁾/ENx outputs delay t₄₅ CC
from FCLP⁴⁾ rising edge
Min.
2x
T_MSC3)
-2
Typ.
−
−
Max.
−
5
-2
−
10
SDI bit time
0
−
21
t₄₆ CC 8 x
−
−
T_MSC
Unit Note /
Test Condition
ns
ns ENx with strong
driver and
sharp (minus )
edge
ns ENx with strong
driver and
medium
(minus) edge
ns ENx with strong
driver and soft
edge
ns
Data Sheet
130
V 1.1, 2014-05