TC1791 Datasheet, PDF (128/153 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1791
Electrical ParametersAC Parameters
Two formulas are defined for the (absolute) approximate maximum value of jitter D_m in
[ns] dependent on the K2 - factor, the SRI clock frequency f_SRI in [MHz], and the number
m of consecutive f_SRI clock periods.
for
(K2 ≤ 100)
and
(m ≤ (f_SRI[MHz]) ⁄ 2)
Dm[ns]
=
⎛
⎝
-----------------7---4---0------------------
K2 × f_SRI[MHz]
+
5_⎠⎞
×
⎛
⎝
-⁽--1----–-----0---^,---0---1----^×-----K-----2---⁾----^×-----⁽--m------–-----1---⁾-
0, 5 × f_SRI[MHz] – 1
+
0,
01
×
K2_⎠⎞
(7)
else
Dm[ns] = -----------------7---4---0------------------ + 5
(8)
K2 × f_SRI[MHz]
With rising number m of clock cycles the maximum jitter increases linearly up to a value
of m that is defined by the K2-factor of the PLL. Beyond this value of m the maximum
accumulated jitter remains at a constant value. Further, a lower SRI-Bus clock frequency
f_SRI results in a higher absolute maximum jitter value.
Note: The specified PLL jitter values are valid if the capacitive load per pin does not
exceed C_L = 20 pF with the maximum driver and sharp edge.
Note: The maximum peak-to-peak noise on the pad supply voltage, measured between
V_DDOSC3 and V_SSOSC, is limited to a peak-to-peak voltage of V_PP = 100 mV for noise
frequencies below 300 KHz and V_PP = 40 mV for noise frequencies above
300 KHz.
The maximum peak-to peak noise on the pad supply voltage, measured between
V_DDOSC and V_SSOSC, is limited to a peak-to-peak voltage of V_PP = 100 mV for noise
frequencies below 300 KHz and V_PP = 40 mV for noise frequencies above
300 KHz.
These conditions can be achieved by appropriate blocking of the supply voltage
as near as possible to the supply pins and using PCB supply and ground planes.
Oscillator Watchdog (OSC_WDT)
The expected input frequency is selected via the bit field SCU_OSCCON.OSCVAL. The
OSC_WDT checks for too low frequencies and for too high frequencies.
The frequency that is monitored is f_OSCREF which is derived for f_OSC.
(9)
f
f
= ----------------^O--^S---^C-------------
OSCREF _{OSCVAL + 1}
The divider value SCU_OSCCON.OSCVAL has to be selected in a way that f_OSCREF is
2.5 MHz.
Data Sheet
121
V 1.1, 2014-05