TC1791 Datasheet, PDF (108/153 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1791
Electrical ParametersDC Parameters
Table 27 ADC Parameters (cont’d)
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
ON resistance for the ADC R_AIN7T 180 550 900 Ohm
test (pull down for AIN7) CC
Resistance of the
reference voltage input
path
R_AREF
−
CC
500 1000 Ohm
Sample time
t_S CC 2
−
Calibration time after bit t_CAL CC −
−
ADC_GLOBCFG.SUCAL
is set
Total Unadjusted
Error^6)5)13)
TUE CC -4
−
Analog reference ground²⁾ V_AGNDx V_SSM - −
SR
0.05
257
4352
T_ADCI
cycle
s
4¹⁴⁾
V_AREFx
-1
LSB
V
ADC
resolution= 12-
bit
Analog input voltage
V_AIN SR V_AGNDx −
Analog reference voltage²⁾ V_AREFx V_AGNDx −
SR
+1
V_AREFx V
V_DDM + V
0.05¹⁵⁾
16)
Analog reference voltage
range⁶⁾⁵⁾²⁾
V_AREFx -
V_AGNDx
SR
V_DDM/2 −
V_DDM + V
0.05
1) The sampling capacity of the conversion C-network is pre-charged to V_AREF/2 before the sampling moment.
Because of the parasitic elements the voltage measured at AINx can deviate from V_AREF/2.
2) Applies to AINx, when used as auxiliary reference input.
3) This represents an equivalent switched capacitance. This capacitance is not switched to the reference voltage
at once. Instead smaller capacitances are successively switched to the reference voltage.
4) The sum of DNL/INL/GAIN/OFF errors does not exceed the related TUE total unadjusted error.
5) If a reduced analog reference voltage between 1V and V_DDM / 2 is used, then there are additional decrease in
the ADC speed and accuracy.
6) If the analog reference voltage range is below V_DDM but still in the defined range of V_DDM / 2 and V_DDM is used,
then the ADC converter errors increase. If the reference voltage is reduced by the factor k (k<1),
TUE,DNL,INL,Gain, and Offset errors increase also by the factor 1/k.
7) If the analog reference voltage is > V_DDM, then the ADC converter errors increase.
8) For 10-bit conversions the error value must be multiplied with a factor 0.25.
9) For 8-bit conversions the error value must be multiplied with a factor 0.0625.
10) For f_ADCI between 18MHz and 20MHz the TUE and Gain Error can increase beyond the given limits. For
STC < 2 INL, DNL , and Offset errors can also increase.
Data Sheet
101
V 1.1, 2014-05