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PTFB193404F_16 Datasheet, PDF (13/14 Pages) Infineon Technologies AG – Thermally-Enhanced High Power RF LDMOS FETs 340 W, 30 V, 1930 – 1990 MHz
PTFB193404F
Package Outline Specifications
2X 45° X 1.19
[45° X .047]
2X 30°
V1
Package H-37275-6/2
13.716
[.540]
CL
31.750
[1.250]
2X 2.032
[.080]
REF
D1
D2
9.398
[.370]
4X
R0.508
+.381
-.127
[
R.020
+.015
-.005
]
2.134
[.084] SPH
1.626
[0.064]
G1
CL
31.242±0.280
[1.230±.011]
CL
G2
CL
4X 11.684
[.460]
2X 3.175
[.125]
2X 1.143
[.045]
V2
3.226±0.508
[.127±.020]
CL 9.144
[.360]
10.160
[.400]
16.612±.500
[.654±.020]
4.585+-00.1.22570
[
.180
+.010
-.005
]
h-37275-6-2_po_02_08-13-2012
32.258
[1.270]
S
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. All tolerances ±0.127 [0.005] unless specified otherwise.
Diagram Notes—unles4s. oPthinesrw: Dis1e, sDp2e–cidfireadin: ; G1, G2 – gate; S – source; V1, V2 – VDD
5. Lead thickness: 0.127 ± 0.051 mm [0.005 ± 0.002 inch].
1. Interpret6.dimGeonldsipolnastinagntdhitcoklneerasns:c1e.s14pe±r 0A.3S8MmEicYr1on4.[54M5 -±191954m. icroinch] max.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. All tolerances ± 0.127 [.005] unless specified otherwise.
4. Pins: D1, D2 - drain, devices 1 & 2; G1, G2 - gate, devices 1 & 2;
V1, V2 - VDD, devices 1 & 2; S - source (flange).
5. Lead thickness: 0.127 ±0.051 [.005 ±.002].
6. Gold plating thickness: 1.14 ± 0.38 micron [45 ± 15 microinch].
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http://www.infineon.com/rfpower
Data Sheet
13 of 14
Rev. 05.2, 2016-06-14