SAK-XE167FM-72F80LAA Datasheet, PDF (129/144 Pages) Infineon Technologies AG – 16-Bit Single-Chip Real Time Signal Controller

XE167FM, XE167GM, XE167HM, XE167KM
XE166 Family / Base Line
Electrical Parameters
CLKOUT
3)
t40
HOLD
t₄₁
HLDA
BREQ
CSx, RD,
WR(L/H)
Addr, Data,
BHE
t₄₁
1)
t10/t14
2)
t₁₁/t₁₂/t₁₃/t₁₅/t₁₆
MC_X_EBCARBREG
Figure 27 External Bus Arbitration, Regaining the Bus
Notes
1. This is the last chance for BREQ to trigger the indicated regain sequence.
Even if BREQ is activated earlier, the regain sequence is initiated by HOLD going
high. Please note that HOLD may also be deactivated without the XE167xM
requesting the bus.
2. The control outputs will be resistive high (pull-up) before being driven inactive (ALE
will be low).
3. The next XE167xM-driven bus cycle may start here.
Data Sheet
129
V2.1, 2011-07