9VRS4339B Datasheet, PDF (9/21 Pages) Integrated Device Technology – VERY LOW POWER CLOCK FOR 2011 NETBOOKS

9VRS4339B
VERY LOW POWER CLOCK FOR 2011 NETBOOKS
SMBus Table: CLKREQ Control Register
Byte 5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
CLKREQA# EN
CLKREQA# Control
CLKREQA# Control
CLKREQA# Control
CLKREQB# EN
CLKREQB# Control
CLKREQB# Control
CLKREQC# EN
Control Function
CLKREQA# Enable
SRC1 is controlled
SRC2 is controlled
SRC3 is controlled
CLKREQB# Enable
SRC4 is controlled
SRC6 is controlled
CLKREQC# Enable
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Not Controlled
Not Controlled
Not Controlled
Disable
Not Controlled
Not Controlled
Disable
1
Enable
Controlled
Controlled
Controlled
Enable
Controlled
Controlled
Enable
Default
0
0
0
0
0
0
0
0
Note: To enable CLKREQC function, please write "0" to Byte 9 bit 7 and "1" to Byte 5 bit 0. To select which output to
control, please make necessay selection in Bytes 3 & 4.
Byte 6 Reserved Register
SMBus Table: Revision and Vendor ID Register
Byte 7
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
Control Function
Revision ID
VENDOR ID
Type
R
R
R
R
R
R
R
R
0
1
B rev = 0001
0001 = ICS/IDT
Default
0
0
0
1
0
0
0
1
SMBus Table: Output Control Register
Byte 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
48M (Pin17) SR
27M / PCI4 SR
Reserved
PCI_SKEW_MODE
LCD_AMP<1>
LCD_AMP<0>
Control Function
Slew Rate Control
Slew Rate Control
Reserved
PCICLK Skew Mode Control
LCD Amplitude Control bit1
LCD Amplitude Control bit0
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
00 = 1.5V/ns
10 = 2.6V/ns
00 = 1.5V/ns
10 = 2.6V/ns
-
PCI Aligned
00 = 700mV
10 = 900mV
1
01 = 2.0V/ns
11 = 3.3V/ns
01 = 2.0V/ns
11 = 3.3V/ns
-
PCI Delayed
01 = 800mV
11 = 1000mV
Note: A ssystem reset maybe required when switching between PCICLK aligned and skew mode
Default
0
0
0
0
0
0
0
1
SMBus Table: Byte Count Register
Byte 9
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
48M_SEL
Reserved
Reserved
BC4
BC3
BC2
BC1
BC0
Control Function
Selects 48M or CLKREQC
Reserved
Reserved
Byte Count Programming
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
CLKREQC
48M
-
-
-
-
Writing to this register will configure how
many bytes will be read back, default is
0F or 1F = 15 bytes.
Default
1
0
0
0
1
1
1
1
Note: To enable CLKREQC function, please write "0" to Byte 9 bit 7 and "1" to Byte 5 bit 0. To select which output to
control, please make necessay selection in Bytes 3 & 4.
SMBus Table: Output Control Register
Byte 10
Name
Bit 7
Bit 6
USB48M (Pin16) SR
Bit 5
Bit 4
REF SR
Bit 3
Bit 2
PCI3 SR
Bit 1
Bit 0
25M SR
Control Function
Slew Rate Control
Slew Rate Control
Slew Rate Control
Slew Rate Control
IDT® VERY LOW POWER CLOCK FOR 2011 NETBOOKS
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
00 = 1.5V/ns
10 = 2.6V/ns
00 = 1.5V/ns
10 = 2.6V/ns
00 = 1.5V/ns
10 = 2.6V/ns
00 = 1.5V/ns
10 = 2.6V/ns
9
1
01 = 2.0V/ns
11 = 3.3V/ns
01 = 2.0V/ns
11 = 3.3V/ns
01 = 2.0V/ns
11 = 3.3V/ns
01 = 2.0V/ns
11 = 3.3V/ns
Default
0
0
0
0
0
0
0
0
9VRS4339B
REV A 010312