9VRS4339B Datasheet, PDF (8/21 Pages) Integrated Device Technology – VERY LOW POWER CLOCK FOR 2011 NETBOOKS

9VRS4339B
VERY LOW POWER CLOCK FOR 2011 NETBOOKS
SMBus Table: Frequency Select, PD Config Source Select Register
Byte 0
Name
Control Function
Type
0
1
Bit 7
Bit 6
Bit 5
Bit 4
FSLC
FSLB
CPU1 STOP EN
CPU0 STOP EN
Freq Select Bit 1
Freq Select Bit 0
Enables Control of CPU1 with
CPU_STOP
Enables Control of CPU0 with
CPU_STOP
RW See Table 1: CPU/SRC PLL Frequency &
RW
Spread Selection Table
RW
Free-Running
Stoppable
RW
Free-Running
Stoppable
Bit 3
Bit 2
Bit 1
Bit 0
PCI_SSEL
SRC_SSEL
SATA_SSEL
PD Config
PCI Source Select
SRC Source Select
SATA Source Select
Forces "cold" start during PD
RW CPU/SRC SS PLL
FIX PLL
RW CPU/SRC SS PLL
FIX PLL
RW CPU/SRC SS PLL
FIX PLL
RW Reset and Relatch Normal PD# mode
Default
Latch
Latch
0
0
0
0
0
1
SMBus Table: CPU, LCD SS and DOT96/SRC5 Control Register
Byte 1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DOT96_SEL
CPU/SRC SS Select
CPU SS1
CPU SS0
LCD SS2
LCD SS1
LCD SS0
LCD SS Select
Control Function
Type
0
1
Selects DOT96 or SRC5
R
SRC5
DOT96
Selects Center or Down Spread
for CPU & SRC
RW
Down Spread
Center Spread
CPU SS Magnitude MSB
RW See Table 1: CPU/SRC PLL Frequency &
CPU SS Magnitude LSB
RW
Spread Selection Table
LCD SS Magnitude MSB
LCD SS Magnitude
LCD SS Magnitude LSB
RW
RW
RW
See Table 2: LCDCLK Spread Spectrum
Table
Selects Center or Down Spread
for LCDCLK
RW
Down Spread
Center Spread
Default
Latch
0
0
0
1
1
0
0
SMBus Table: Output Enable Control Register
Byte 2
Name
Control Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
REF OE
48M OE (Pin17)
USB48M OE (Pin16)
25M OE
PCI3 OE
PCI2 OE
PCI_F1 OE
CPU_ITP STOP EN
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Enables Control of CPU_ITP
with CPU_STOP
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Free-Running
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Stoppable
Default
1
1
1
1
1
1
1
0
SMBus Table: Output Enable Control Register
Byte 3
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
SRC7 OE
SRC6 OE
CLKREQC# Control
CLKREQC# Control
PCI4/27M OE
LCDCLK OE
SRC4 OE
SATA OE
Control Function
Output Enable
Output Enable
SRC5 is controlled
SRC7 is controlled
Output Enable
LCDPLL & Output Enable
Output Enable
Output Enable
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Not Controlled
Not Controlled
Disable
Disable
Disable
Disable
1
Enable
Enable
Controlled
Controlled
Enable
Enable
Enable
Enable
Default
1
1
0
0
1
1
1
1
SMBus Table: Output Enable and SS Enable Control Register
Byte 4
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
SRC3 OE
SRC2 OE
CPU_ITP/SRC1 OE
DOT96/SRC5 OE
CPU1 OE
CPU0 OE
CPU/SRC PLL SS EN
CLKREQC# Control
Control Function
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
SATA is controlled
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
SS OFF
Not Controlled
1
Enable
Enable
Enable
Enable
Enable
Enable
SS ON
Controlled
Default
1
1
1
1
1
1
1
0
IDT® VERY LOW POWER CLOCK FOR 2011 NETBOOKS
8
9VRS4339B
REV A 010312