9VRS4339B Datasheet, PDF (14/21 Pages) Integrated Device Technology – VERY LOW POWER CLOCK FOR 2011 NETBOOKS

9VRS4339B
VERY LOW POWER CLOCK FOR 2011 NETBOOKS
AC Electrical Characteristics–CPU, SRC, SATA, DOT96MHz
PAR AM ETE R
SYMBOL
CONDITIONS
MIN
Rising Edge Slew Rate
tS LR
Differential Measurement
2.5
Fa lling E dge Slew Rate
tFL R
Differential Measurement
2.5
Slew Rate Variation
tSL VAR
Single-ended Measurement
Maximum Output Voltage
VHIGH
Includes overshoot
Minimum Output Voltage
VLOW
Includes undershoot
-300
Differential Volta ge Swing
V SWIN G
Differential Measurement
3 00
Crossing Point Voltage
VXABS
Single-ended Measurement
3 00
Crossing Point Variation
VXABSVAR
Single-ended Measurement
Duty Cycle
D CY C
Differential Measurement
45
CPU Jitter - Cycle to Cycle
CPUJC2C
Differential Measurement
SRC Jitter - Cycle to Cycle
SRCJC2C
Differential Measurement
SATA Jitter - Cycle to Cycle
SATA JC 2C
Differential Measurement
DOT Jitter - Cycle to Cycle
DOTJC2C
Differential Measurement
CPU[1:0] Skew
C PU10 SKEW
Differential Measurement
CPU[ITP:0] Skew
C PU20 SKEW
Differential Measurement
PCIEX(6, 4:2) Skew
PC IEXS KEW
Differential Measurement
PCIEX(7:1) Skew
PC IEXS KEW
Differential Measurement
Notes: T_A = 0 - 7 0°C; V_DD = 3.3 V +/-5%; C_L=2pF, Rs=0Ω (unle ss specified o ther wise)
1 _{Gua ranteed by design and cha racterization, not 100% tested in prod uction.}
2 _{All Long Term Accuracy and Clo ck Pe riod spe cifica tions are guaranteed assuming that REFOUT is at 25.0000 00MHz}
3 _{Slew rate emastu red throu gh V _swing vo ltag e ran ge centered abo ut differe ntial zero}
4 _{Vcross is defined at the vo ltage where Clock = Clock#.}
5 _{Onl y applies to th e differential r ising edg e (Clock rising, Clock# fa lling.)}
6 _{CPU gro up skew is nominal ly 0ps.}
MAX UNITS NOTES
4
V /ns
1,3
4
V /ns
1,3
20
%
1,3
1150
mV
1
mV
1
mV
1
550
mV
1,3,4
140
mV
1,3,5
55
%
1
85
ps
1
85
ps
1
125
ps
1
250
ps
1
100
ps
1,6
150
ps
1,6
250
ps
1
500
ps
1
Electrical Characteristics–USB48MHz/48MHz
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX UNITS
Long Accuracy
ppm
see Tperiod min-max values
-100
100
ppm
Clock period
T_{p eriod}
48.00MHz output nominal
20.83125 20.83542 ns
Absolute min/max period
T _{ab s}
48.00MHz output nominal
20.48125 21.18542 ns
Output High Voltage
V_OH
I_OH = -1 mA
2.4
V
Output Low Voltage
V_OL
I_OL = 1 mA
0.4
V
Output High Current
I_OH
V OH @MIN = 1.0 V
V_OH@MAX = 3.135 V
- 29
mA
-2 3
mA
Output Low Current
I_OL
V_OL @ MIN = 1.95 V
V_OL @ MAX = 0.4 V
29
mA
27
mA
Rising Edge Slew Rate (USB48M)
t_{SL R}
Me asured from 0.8 to 2.0 V
1
2
V /ns
Falling Edge Slew Rate (USB48 M)
t _{FL R}
Me asured from 2.0 to 0.8 V
1
2
V /ns
Rising Edge Slew Rate (48M)
t_{SL R}
Me asured from 0.8 to 2.0 V
1
4
V /ns
Falling Edge Slew Rate (48M)
t _{FL R}
Me asured from 2.0 to 0.8 V
1
4
V /ns
Duty Cycle
dt1
V_T = 1.5 V
45
55
%
Jitte r, Cycle to cycle
t_{j cyc-cyc}
V_T = 1.5 V
35 0
ps
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, Rs=39ohm, CL=5pF
1 _{Unless otherwise noted, gu aranteed by design and ch aracterization, no t 100% teste d in prod uction.}
2 _{All Long Term Accuracy and Clo ck Pe riod spe cifica tions are guaranteed assuming that REFOUT is at 25.0000 00MHz}
3_{E dge rate in system is measured from 0.8V to 2.0V.}
4 _{Duty cycle, Peroid and Jitter are me asur ed with re spe ct to 1.5V}
5 _{The ave rage period over any 1us period of time}
6 _{Usin g freque ncy coun ter with th e measurment in terval equal or greater tha t 0.1 5s. Target frequ encie s are 14.318181 MHz, 25.0000 00MHz, 33.33333 3MHz,}
27.00000 0MHz an d 48 .000 000MHz
NOTES
1,2
1,2,5
1,2
1
1
1
1
1
1
1,3
1,3
1,3
1,3
1,4
1,4
IDT® VERY LOW POWER CLOCK FOR 2011 NETBOOKS
14
9VRS4339B
REV A 010312