9VRS4339B Datasheet, PDF (6/21 Pages) Integrated Device Technology – VERY LOW POWER CLOCK FOR 2011 NETBOOKS

9VRS4339B
VERY LOW POWER CLOCK FOR 2011 NETBOOKS
Power Distribution Table
3.3V VDD
3
7
14
15
20
-
-
-
-
Pin Number
1.5V VDD 1.05-1.5V VDD
-
-
-
-
-
-
-
-
-
-
25
-
-
34
48
-
-
49
GND
56
11
12
18
22
28, 29
40
52
52
Description
25MHz Crystal I/O; Internal Control Logic; 25MHz Output
PCICLK Outputs
14.318MHz & 27MHz outputs, 14/27MHz PLL Digital
48MHz output
27MHz output, 14/27MHz PLL analog
DOT96 Fix PLL Analog & Digital, LCD100 PLL Analog & Digital
SRC Outputs
CPU/SRC PLL Analog & Digital
CPU Outputs
CPU Power Management Table
CLKPWRGD/P SMBus
D #_3.3
1
1
0
Register OE
En able
En able
X
X
Disable
CPU_STOP#
1
0
X
X
CPU (0, 1, ITP)
True O/P
R unning
Hig h
Low/20 K
Comp. O/P
Runn ing
Low
Low
Low/20 K
Low
DOT96 and SATA Power Management Table
CLKPWRGD/P SMBus
D #_3.3
Register OE
1
En able
1
En able
0
X
X
Disable
PCI_ STOP#
1
1
X
X
CLKR EQ C#
0
1
X
X
SATA
PEREQC# Controlled
True O/P
Runn ing
Comp. O/P
R unning
Lo w/20K
Lo w
Lo w/20K
Lo w
Lo w/20K
Lo w
SATA
PEREQC# Not-Controlled
True O/P
Runn ing
Comp. O/P
R unning
Runn ing
Lo w/20K
R unning
Lo w
Lo w/20K
Lo w
DOT96
True O/P
Runn ing
Runn ing
Lo w/20K
Lo w/20K
Comp. O/P
R unning
R unning
Lo w
Lo w
SRC Power Management Table
CLKPWRGD/P SMBus
D #_3.3
Register OE
PCI_ STO P#
CLKREQx#
1
En able
1
0
1
En able
1
1
1
En able
0
0
1
En able
0
1
0
En able
X
X
X
Disable
X
X
SRC controlled by
SRC not controlled by
CLKREQx#
CLKREQx#
Free -Running
True O/P
Runn ing
Lo w/20K
Runn ing
Lo w/20K
Lo w/20K
Lo w/20K
Comp. O/P
R unni ng
Lo w
R unni ng
Lo w
Lo w
Lo w
True O/P
Runn ing
Runn ing
Runn ing
Runn ing
Lo w/20K
Lo w/20K
C omp. O/P
R unni ng
R unni ng
R unni ng
R unni ng
Lo w
Lo w
SRC controlled by
SRC not controlled by
CLKREQx#
CLKR EQx#
Stoppa ble
True O/P
Runn ing
Lo w/20K
Hig h
Lo w/20K
Lo w/20K
Lo w/20K
Comp. O/P
R unni ng
Lo w
Lo w
Lo w
Lo w
Lo w
True O/P
Running
Running
High
High
Low/20 K
Low/20 K
Com p. O/P
R unni ng
R unni ng
Low
Low
Low
Low
SIngle-ended Power Management Table
CLKPWRGD/P SMBus
D #_3.3
Register OE
PCI_ STO P#
1
En able
1
1
En able
0
0
En able
X
0
Disable
X
1
Disable
X
PCI_F1, PCI2, PCI4
Free-run
R unni ng
R unni ng
Hi-Z
Hi-Z
Lo w
Stoppa ble
Runn ing
Low
Hi-Z
Hi-Z
Low
PC I3
Free-run
R unning
R unning
Lo w
Lo w
Lo w
Stoppa ble
Runn ing
Low
Low
Low
Low
2 5M
WOL
Enabled
R unning
R unning
R unning
Lo w
Lo w
WOL
Di sabled
Runn ing
Runn ing
Low
Low
Low
1 4.318 M
USB48
48 M
2 7MH z
R unni ng
R unni ng
Hi-Z
Hi-Z
Lo w
Running
Running
Hi-Z
Hi-Z
Lo w
R unni ng
R unni ng
Low
Low
Low
R unni ng
R unni ng
Hi-Z
Hi-Z
Lo w
CLKREQ# Control Table
CLKREQ#
A
B
C
SRC /SATA
controlle d
SRC1, 2, 3
SRC4, 6
SRC5, 7,
SATA
IDT® VERY LOW POWER CLOCK FOR 2011 NETBOOKS
6
9VRS4339B
REV A 010312