ICS9P935 Datasheet, PDF (6/13 Pages) Integrated Device Technology – DDR I/DDR II Phase Lock Loop Zero Delay Buffer

ICS9P935
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
Electrical Characteristics - Input/Supply/Common Output Parameters
T_A = 0 - 70°C; Supply Voltage A_VDD, V_DD = 2.5V ± 0.2V
PARAMETER
SYMBOL
CONDITIONS
Input High Current
Input Low Current
Operating Supply
Current
Output High Current
I_IH
I_IL
I_DD2.5
I_DDPD
I_OH
V_I = V_DD or GND
V_I = V_DD or GND
C_L = 0pf @ 200MHz
C_L = 0pf
V_DD = 2.3V, V_OUT = 1V
Output Low Current
I_OL V_DD = 2.3V, V_OUT = 1.2V
High Impedance
Output Current
I_OZ V_DD=2.7V, Vout=V_DD or GND
Input Clamp Voltage
V_IK V_DDQ = 2.3V Iin = -18mA
High-level output
voltage
Low-level output voltage
Input Capacitance¹
Output Capacitance¹
V_OH
V_OL
C_IN
C_OUT
V_DD = min to max,
I_OH = -1 mA
V_DDQ = 2.3V,
I_OH = -12 mA
V_DD = min to max
I_OL=1 mA
V_DDQ = 2.3V
I_OH=12 mA
V_I = GND or V_DD
V_OUT = GND or V_DD
MIN
5
-18
26
V_DDQ - 0.1
1.7
TYP
250
-32
35
3
3
MAX
5
100
±10
-1.2
UNITS
µA
µA
mA
µA
mA
mA
mA
V
V
V
0.1
V
0.6
V
pF
pF
IDT^TM/ICS^TM DDR I/DDR II Phase Lock Loop Zero Delay Buffer
6
ICS9P935 REV H 12/1/08