ICS9P935 Datasheet, PDF (3/13 Pages) Integrated Device Technology – DDR I/DDR II Phase Lock Loop Zero Delay Buffer

ICS9P935
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
Absolute Max
Supply Voltage
Logic Inputs
Ambient Operating Temperature
Case Temperature
Storage Temperature
-0.5V to 2.7V
GND –0.5 V to VDD +0.5 V
0°C to +70°C
115°C
–65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T_A = 0 - 70°C; Supply Voltage AVDD, VDD = 1.8 V +/- 0.1V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
Input High Current
I_IH V_I = V_DD or GND
Input Low Current
I_IL V_I = V_DD or GND
Output Disabled Low
Current
I_ODL OE = L, V_ODL = 100mV
100
Operating Supply
Current
I_DD1.8
I_DDLD
C_L = 0pf @ 100MHz
C_L = 0pf
Input Clamp Voltage
V_IK V_DDQ = 1.8V Iin = -18mA
High-level output
voltage
V_OH
I_OH = -100µA
I_OH = -9mA
V_DD -0.2
1.1
Low-level output voltage
V_OL
I_OL=100µA
I_OL=9mA
Input Capacitance¹
C_IN V_I = GND or V_DD
2
Output Capacitance¹
C_OUT V_OUT = GND or V_DD
2
MAX
±250
±10
300
500
-1.2
0.1
0.6
3
3
UNITS
µA
µA
µA
mA
µA
V
V
V
V
V
pF
pF
IDT^TM/ICS^TM DDR I/DDR II Phase Lock Loop Zero Delay Buffer
3
ICS9P935 REV H 12/1/08