92HD87 Datasheet, PDF (28/204 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD87
SINGLE CHIP PC AUDIO SYSTEM, CODEC+STEREO SPEAKER AMPLIFIER+CAPLESS HP+LDO
2.21. Digital Core Voltage Regulator
The digital core operates from 1.4 to 1.98V making it compatible with 1.5V (5%) and 1.8V (10%) sup-
ply voltages. Many systems require that the CODEC use a single 3.3V digital supply, so an inte-
grated regulator is included on die. The regulator uses pin 7, DVDD, as its voltage source. The
output of the LDO is connected to pin 1 and the digital core. A 10uF capacitor must be placed on pin
1 for proper load regulation and regulator stability.
The digital core voltage regulator is only dependent on DVDD. The CODEC digital logic and I/O
(unless referenced to AVDD) will operate in the absence of AVDD. DVDD and AVDD supply
sequencing for the application of power and the removal of power is neither defined nor guaranteed.
It is common for desktop systems to supply AVDD from the system standby supply and the CODEC
will tolerate, indefinitely, the condition where AVDD is active but DVDD and DVDDIO are inactive.
To prevent pops, software is expected to mute paths as close to the port as is possible when chang-
ing power states or signal topology.
2.22. Aux Audio Support
The codec supports an auxiliary audio mode where analog audio is supported by default after power
is supplied with the HD Audio bus disabled. In this mode, an analog input is routed to one of several
output ports depending on jack presence detection.
In addition to shutting off the CODEC BTL and headphone amplifiers when the docked device output
jack is used, the BTL amplifier will be disabled when the headphone jacks are used, and the head-
phone amplifiers will be disabled when not in use.
2.22.1.
General conditions in Aux Audio Mode:
• HD Audio Link is off (RST# is 0, active, and BitClk is 0, inactive. CODEC does not need to mon-
itor BitClk to enter/exit this mode but must not depend on BitClk to operate.)
• HD Audio CODEC analog and digital supplies are active.
• Port A may be an optional headphone jack (Normal and Aux Audio Mode) or an internal micro-
phone port (Normal Mode only)
• Port B connect to the system headphone jack.
• Port C connects to the system microphone Jack
• Port D connects to the internal speakers.
• Port E is not present on the CODEC but the port presence detect is available and used to con-
trol internal resources.
• Port F is connected to the dock AUX Audio In (it is an input port)
• EAPD is used to control the power state of the mixer, BTL amplifier, and headphone amplifiers.
The amplifiers are off if EAPD is held low.
• Internal circuitry will delay enabling (change power state, un-mute, etc.) the output amplifiers
after the application of power or EAPD=1 to prevent pops.
• Internal circuitry will orchestrate power down (EAPD = 0) to prevent pops.
• EAPD must be forced low before removing power.
• No special Dock Present signal needed. Only port presence detect for port E is used to disable
the speaker amplifier if the docked device has something plugged into its headphone jack.
• DCN HDA015-B “clock-less D3” operation presents a problem. Clock Stop OK or similar commu-
nication will be used to prevent problems when an OS driver attempts to put the HD Audio bus
controller into D3 to save power. The bus must not be place into reset with the clock stopped or
IDT CONFIDENTIAL
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©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V 0.995 01/11
92HD87