92HD87 Datasheet, PDF (197/204 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD87
SINGLE CHIP PC AUDIO SYSTEM, CODEC+STEREO SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
Rsvd1
Set
Bits
R/W
Default
Reset
3:2
R
0h
N/A (Hard-coded)
Reserved.
1:0
RW
0h
POR - DAFG - LR
Current power state setting for this widget.
8.29.4. DigBeep (NID = 21h): Gen
Reg Byte 4 (Bits 31:24) Byte 3 (Bits 23:16) Byte 2 (Bits 15:8)
Set
Get
F0A00h
Byte 1 (Bits 7:0)
70Ah
Field Name
Rsvd
Divider
Bits
R/W
Default
Reset
31:8
R
000000h
N/A (Hard-coded)
Reserved.
7:0
RW
00h
POR - DAFG - LR
Enable internal PC-Beep generation. Divider == 00h disables internal PC Beep
generation and enables normal operation of the codec. Divider != 00h gener-
ates the beep tone on all Pin Complexes that are currently configured as out-
puts. The HD Audio spec states that the beep tone frequency = (48kHz HD
Audio SYNC rate) / (4*Divider), producing tones from 47 Hz to 12 kHz (logarith-
mic scale).
IDT CONFIDENTIAL
197
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
V 0.995 01/11
92HD87