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ICS844S42I Datasheet, PDF (25/27 Pages) Integrated Device Technology – On-chip crystal oscillator for reference frequency generation
ICS844S42I Data Sheet
DUAL OUTPUT RF FREQUENCY SYNTHESIZER
Package Outline and Package Dimensions
Package Outline - K Suffix for 56 Lead VFQFN
S eating Plan e
Ind exArea
N
To p View
A1
AAnnvviill
SiSnignguulalatitoionn
or
SaOwRn
Singulation
A3 L
E 2 E2
2
(N -1)x e
(R ef.)
N
D
Chamfer 4x
0.6 x 0.6 max
OPTIONAL
A
0. 08 C
e
(Ref.)
N &N
Odd
C
D2
2
D2
(Ref.)
N &N
Even
e (Ty p.)
2 If N & N
1 are Even
2
(N -1)x e
(Re f.)
b
Th er mal
Ba se
Bottom View w/Type A ID
Bottom View w/Type C ID
2
2
1
1
CHAMFER
4
N N-1
RADIUS
4
N N-1
There are 2 methods of indicating pin 1 corner at the back of the VFQFN package are:
1. Type A: Chamfer on the paddle (near pin 1)
2. Type C: Mouse bite on the paddle (near pin 1)
Table 9. Package Dimensions
SPEC NON_JEDEC: VLLD-2/-5
All Dimensions in Millimeters
Symbol Minimum Maximum
N
56
A
0.80
1.00
A1
0
0.05
A3
0.25 Ref.
b
0.18
0.30
ND & NE
D&E
14
8.00 Basic
D2
4.35
4.65
SPEC NON_JEDEC: VLLD-2/-5
All Dimensions in Millimeters
Symbol Minimum Maximum
E2
5.05
5.35
e
0.50 Basic
L
0.30
0.50
Reference Document: JEDEC Publication 95, MO-220
NOTE: The following package mechanical drawing is a generic
drawing that applies to any pin count VFQFN package. This drawing
is not intended to convey the actual pin count or pin layout of this
device. The pin count and pinout are shown on the front page. The
package dimensions are in Table 9.
ICS844S42BKI REVISION A FEBRUARY 21, 2012
25
©2012 Integrated Device Technology, Inc.