ICS844S42I Datasheet, PDF (18/27 Pages) Integrated Device Technology – On-chip crystal oscillator for reference frequency generation

ICS844S42I Data Sheet
DUAL OUTPUT RF FREQUENCY SYNTHESIZER
3.3V LVDS Driver Termination
For a general LVDS interface, the recommended value for the
termination impedance (Z_T) is between 90 and 132. The actual
value should be selected to match the differential impedance (Z₀) of
your transmission line. A typical point-to-point LVDS design uses a
100 parallel resistor at the receiver and a 100 differential
transmission-line environment. In order to avoid any
transmission-line reflection issues, the components should be
surface mounted and must be placed as close to the receiver as
possible. IDT offers a full line of LVDS compliant devices with two
types of output structures: current source and voltage source. The
standard termination schematic as shown in Figure 5A can be used
with either type of output structure. Figure 5B, which can also be used
with both output types, is an optional termination with center tap
capacitance to help filter common mode noise. The capacitor value
should be approximately 50pF. If using a non-standard termination, it
is recommended to contact IDT and confirm if the output structure is
current source or voltage source type. In addition, since these
outputs are LVDS compatible, the input receiver’s amplitude and
common-mode input range should be verified for compatibility with
the output.
LVDS
Driver
Z_O • Z_T
Figure 5A. Standard Termination
LVDS
Z_T
Receiver
LVDS
Driver
Z_O • Z_T
Figure 5B. Optional Termination
Figure 5. Typical LVDS Driver Termination
Z_T
2 _LVDS
C
Z_T Receiver
2
ICS844S42BKI REVISION A FEBRUARY 21, 2012
18
©2012 Integrated Device Technology, Inc.