ICS9LPRS501 Datasheet, PDF (18/28 Pages) Integrated Device Technology – 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR

ICS9LPRS501
64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR
Advance Information
PCI_STOP# Power Management
SMBus OE Bit
Enable
PCI_STOP#
1
0
Disable
X
Stop Drive Mode
X
0
1
X
Single-ended Clocks
Stoppable Free running
Running
Running
Low
Low
Low
Differential Clocks
(Except CPU)
Stoppable Free running
Running
Running
CK= High
CK# = Low
Running
CK= Pull
down
Running
CK# = Low
CK= Pull down, CK# = Low
CPU_STOP# Power Management
SMBus OE Bit
Enable
PCI_STOP#
1
0
Disable
X
Differential Clocks
Stop Drive Mode Stoppable Free running
X
Running
Running
0
CK= High
CK# = Low
Running
1
CK= Pull down _Running
CK# = Low
X
Low
CR# Power Management
SMBus OE Bit
CR#
Enable
1
0
Disable
X
Stop Drive Mode
X
Differential Clocks
Stoppable Free running
Running
Running
CK= Pull down, CK# = Low
CK = Pull down, CK# = Low
PD# Power Management
Single-ended Clocks
Device State
Latches Open
w/o Latched input w/Latched input
Differential Clocks
(Except CPU1)
CK= Pull down, CK# = Low
Power Down
Low
M1
Virtual Power Cycle
to Latches Open
CK= Pull down
CK# = Low
Hi-Z
CK= Pull down
CK# = Low
CK= Pull down, CK# = Low
CPU1
CK= Pull down, CK# = Low
CK= Pull down
CK# = Low
Running
CK= Pull down, CK# = Low
IDT^TM/ICS^TM 64-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor
18
1121F—02/23/09