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ICS814S208I Datasheet, PDF (18/23 Pages) Integrated Device Technology – FemtoClock® Crystal-to-LVDS 8-Output Clock Synthesizer
ICS814S208I Data Sheet
FEMTOCLOCK® CRYSTAL-TO-LVDS 8-OUTPUT CLOCK SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS814S208I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS14S208I is the sum of the core power plus the analog power plus the power dissipation in the load(s).
The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
The maximum current at 85°C is as follows:
IDD_MAX = 332mA
IDDA_MAX = 20mA
• Power (core)MAX = VDD_MAX * (IDD_MAX + IDDA_MAX) = 3.465V * (332mA + 20mA) = 1219.68mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 30.5°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 1.220W * 30.5°C/W = 122.2°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resistance θJA for 48 Lead VFQFN, Forced Convection
θJA by Velocity
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
30.5°C/W
1
26.7°C/W
2.5
23.9°C/W
ICS814S208BKILF REVISION B OCTOBER 13, 2011
18
©2011 Integrated Device Technology, Inc.