ICS814S208I Datasheet, PDF (16/23 Pages) Integrated Device Technology – FemtoClock® Crystal-to-LVDS 8-Output Clock Synthesizer

ICS814S208I Data Sheet
FEMTOCLOCK^® CRYSTAL-TO-LVDS 8-OUTPUT CLOCK SYNTHESIZER
LVDS Driver Termination
For a general LVDS interface, the recommended value for the
termination impedance (Z_T) is between 90Ω and 132Ω. The actual
value should be selected to match the differential impedance (Z₀) of
your transmission line. A typical point-to-point LVDS design uses a
100Ω parallel resistor at the receiver and a 100Ω differential
transmission-line environment. In order to avoid any
transmission-line reflection issues, the components should be
surface mounted and must be placed as close to the receiver as
possible. IDT offers a full line of LVDS compliant devices with two
types of output structures: current source and voltage source. The
standard termination schematic as shown in Figure 5A can be used
with either type of output structure. Figure 5B, which can also be
used with both output types, is an optional termination with center tap
capacitance to help filter common mode noise. The capacitor value
should be approximately 50pF. If using a non-standard termination, it
is recommended to contact IDT and confirm if the output structure is
current source or voltage source type. In addition, since these
outputs are LVDS compatible, the input receiver’s amplitude and
common-mode input range should be verified for compatibility with
the output.
LVDS
Driver
Z_O • Z_T
Figure 5A. Standard Termination
LVDS
Z_T
Receiver
LVDS
Driver
Z_O • Z_T
Figure 5B. Optional Termination
LVDS Termination
Z_T
2 _LVDS
C
Z_T Receiver
2
Recommendations for Unused Input and Output Pins
Inputs:
REF_CLK/nREF_CLK Inputs
For applications not requiring the use of the differential input, both
REF_CLK and nREF_CLK can be left floating. Though not required,
but for additional protection, a 1kΩ resistor can be tied from
REF_CLK to ground.
Crystal Inputs
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1kΩ resistor can be tied from
XTAL_IN to ground.
Outputs:
LVDS Outputs
All unused LVDS output pairs can be either left floating or terminated
with 100Ω across. If they are left floating, we recommend that there
is no trace attached.
LVCMOS Output
The unused LVCMOS output can be left floating. There should be no
trace attached.
LVCMOS Control Pins
All control pins have internal pullups or pulldowns; additional
resistance is not required but can be added for additional protection.
A 1kΩ resistor can be used.
ICS814S208BKILF REVISION B OCTOBER 13, 2011
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©2011 Integrated Device Technology, Inc.