ICS874S02I Datasheet, PDF (14/16 Pages) Integrated Device Technology – One differential clock input pair

ICS874S02I
1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
Reliability Information
Table 8. θ_JA vs. Air Flow Table for a 20 Lead SOIC
θ_JA by Velocity
Linear Feet per Minute
0
Multi-Layer PCB, JEDEC Standard Test Boards
64.7°C/W
Transistor Count
The transistor count for ICS874S02I is: 1358
200
56.7°C/W
500
53.5°C/W
Package Outline and Package Dimensions
Package Outline - M Suffix for 20 Lead SOIC
Table 9. Package Dimensions for 20 Lead SOIC
300 Millimeters
All Dimensions in Millimeters
Symbol Minimum Maximum
N
20
A
2.65
A1
0.10
A2
2.05
2.55
B
0.33
0.51
C
0.18
0.32
D
12.60
13.00
E
7.40
7.60
e
1.27 Basic
H
10.00
10.65
h
0.25
0.75
L
0.40
1.27
α
0°
8°
Reference Document: JEDEC Publication 95, MS-013, MS-119
IDT™ / ICS™ LVDS CLOCK GENERATOR
14
ICS874S02BMI REV. AOCTOBER 16, 2008