ICS874S02I Datasheet, PDF (1/16 Pages) Integrated Device Technology – One differential clock input pair

1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
ICS874S02I
General Description
The ICS874S02I is a highly versatile 1:1 Differential-
ICS
to-LVDS Clock Generator and a member of the
HiPerClockS™ _{HiPerClockS™ family of High Performance Clock}
Solutions from IDT. The ICS874S02I has a fully
integrated PLL and can be configured as a zero
delay buffer, multiplier or divider, and has an output frequency
range of 62.5MHz to 1GHz. The reference divider, feedback
divider and output divider are each programmable, thereby
allowing for the following output-to-input frequency ratios: 8:1, 4:1,
2:1, 1:1, 1:2, 1:4, 1:8. The external feedback allows the device to
achieve “zero delay” between the input clock and the output
clocks. The PLL_SEL pin can be used to bypass the PLL for
system test and debug purposes. In bypass mode, the reference
clock is routed around the PLL and into the internal output
dividers.
Features
• One differential LVDS output pair and
one differential feedback output pair
• One differential clock input pair
• CLK/nCLK can accept the following differential input levels:
LVPECL, LVDS, LVHSTL, SSTL
• Input frequency range: 62.5MHz to 1GHz
• Output frequency range: 62.5MHz to 1GHz
• VCO range: 500MHz - 1GHz
• External feedback for "zero delay" clock regeneration with
configurable frequencies
• Programmable dividers allow for the following output-to-input
frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8
• Cycle-to-cycle jitter: 35ps (maximum)
• Static phase offset: ±100ps
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Available in standard (RoHS 5) package
Block Diagram
PLL_SEL ^Pullup
CLK ^Pulldown
nCLK ^Pullup
÷1, ÷2, ÷4, ÷8,
÷16, ÷32, ÷64
0
1
PLL
FB_IN ^Pulldown
nFB_IN ^Pullup
8:1, 4:1, 2:1, 1:1,
1:2, 1:4, 1:8
SEL0 ^Pulldown
SEL1 ^Pulldown
SEL2 ^Pulldown
SEL3 ^Pulldown
MR Pulldown
IDT™ / ICS™ LVDS CLOCK GENERATOR
Q
nQ
QFB
nQFB
Pin Assignment
CLK 1
nCLK 2
MR 3
nFB_IN 4
FB_IN 5
SEL2 6
VDDO 7
nQFB 8
QFB 9
GND 10
20 SEL1
19 SEL0
18 VDD
17 PLL_SEL
16 VDDA
15 SEL3
14 GND
13 Q
12 nQ
11 VDDO
ICS874S02I
20-Lead SOIC
7.5mm x 12.8mm x 2.3mm package body
M Package
Top View
1
ICS874S02BMI REV. AOCTOBER 16, 2008