IC42S16160 Datasheet, PDF (2/69 Pages) Integrated Circuit Solution Inc – 4M x 16Bit x 4 Banks (256-MBIT) SDRAM

IC42S16160
4M x 16 Bits x 4 Banks (256-MBIT)
SYNCHRONOUS DYNAMIC RAM
FEATURES
• Single 3.3V (± 0.3V) power supply
• High speed clock cycle time -6: 166MHz,
-7: 133MHz
• Fully synchronous operation referenced to clock
rising edge
• Possible to assert random column access in
every cycle
• Quad internal banks contorlled by BA0 & BA1
(Bank Select)
• Byte control by LDQM and UDQM for
IC42S16160
• Programmable Wrap sequence (Sequential /
Interleave)
• Programmable burst length (1, 2, 4, 8 and full
page)
• Programmable CAS latency (2 and 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• LVTTL compatible inputs and outputs
• 8,192refresh cycles / 64ms
• Burst termination by Burst stop and Precharge
command
• Package 400mil 54-pin TSOP-2
DESCRIPTION
The IC42S16160 are high-speed 256M-bits synchro-
nous dynamic random-access memories, organized
as 4M x 16 x 4 (word x bit x bank), respectively.
The synchronous DRAMs achieved high-speed data
transfer using the pipeline architecture and clock
frequency up to 166MHz for -6. All input and outputs are
synchronized with the positive edge of the clock.The
synchronous DRAMs are compatible with Low Voltage
TTL (LVTTL).These products are packaged in 54-pin
TSOP-2.
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
DR037-0A 9/05/2003