IC42S32202L Datasheet, PDF (18/62 Pages) Integrated Circuit Solution Inc – 512K x 32 Bit x 4 Banks (64-MBIT) SDRAM

IC42S32202/L
• Test Mode field (A8~A7)
These two bits are used to enter the test mode and must be programmed to “00”in normal operation.
A8
A7
0
0
0
1
1
X
Test Mode
normal mode
Vendor Use Only
Vendor Use Only
• Write Burst Length (A9)
This bit is used to select the burst write length.
A9
Write Burst Length
0
Burst
1
Single Bit
8 No-Operation command
(RAS#=”H”,CAS#=”H”,WE#=”H”)
The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS#
is Low).This prevents unwanted commands from being registered during idle or wait states.
9 Burst Stop command
(RAS#=”H”,CAS#=”H”,WE#=”L”)
The Burst Stop command is used to terminate either fixed-length or full-page bursts.This
command is only effective in a read/write burst without the auto precharge function.The terminated
read burst ends after a delay equal to the CAS#latency (refer to the following figure).The
termination of a write burst is shown in the following figure.
T0
T1
T2
T3
T4
T5
T6
T7
T8
CL K
COMMAND
READ A
NOP
NOP
NOP
Burst Stop
NOP
NOP
NOP
NOP
CAS# latency=2
tCK2,DQ’s
DOUT A0
DOUT A1
DOUT A2
The Burst ends after a delay equal to the CAS# latency.
DOUT A3
CAS# latency=3
tCK3,DQ’s
DOUT A0
DOUT A1
DOUT A2
DOUT A3
Termination of a Burst Read Operation (Burst Length > 4,CAS#Latency =2,3)
CL K
COMMAN D
T0
T1
T2
T3
T4
T5
NOP
WRITE A
NOP
NOP
Burst Stop
NOP
T6
NOP
T7
NOP
T8
NOP
CAS# latency=2,3
DQ’s
DIN A0
DIN A1
DIN A2
don’t care
Input Data for the Write is masked.
Termination of a Burst Write Operation (Burst Length =X)
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Integrated Circuit Solution Inc.
DR042-0C 08/17/2004