IC-MH16_15 Datasheet, PDF (6/25 Pages) IC-Haus GmbH – 12-BIT ANGULAR HALL ENCODER

iC-MH16
12-BIT ANGULAR HALL ENCODER
preliminary
Rev A1, Page 6/25
ELECTRICAL CHARACTERISTICS
Operating conditions:
VDD = 5 V ±10 %, EP = VNA1 = VNA2 = VND, Tj = -40...125 °C, IBM adjusted to 200 µA, 4 mm NdFeB magnet, unless otherwise noted
Item Symbol Parameter
No.
Conditions
Unit
Min. Typ. Max.
407 Vosr
Reference Voltage Offset Com-
pensation
470 500 530 mV
Clock Generation
501 f()sys
System Clock
bias current adjusted
0.8 1.0 1.2 MHz
502 f()sdc
Sine/Digital Converter Clock
bias current adjusted
13.65 16
19 MHz
Sine/Digital Converter
601 RESsdc Sine/Digital Converter Resolution
12
bit
602 AAabs
603 AArel
Absolute Angular Accuracy
Relative Angular Accuracy
Vpp() = 4 V, adjusted
with reference to an output period at A, B.
CFGRES = 0x0FF, ENF = 0x1, PRM = 0x0,
GAING = 0x0, Vpp(SIN/COS) = 4 Vpp.
see Figure 19
-0.35
0.35 Deg
± 10
%
604 f()ab
Output Frequency at A, B
CFGMTD = 0x0, CFGRES = 0x3FF
CFGMTD = 0x1, CFGRES = 0x3FF
CFGMTD = 0x2, CFGRES = 0x3FF
CFGMTD = 0x3, CFGRES = 0x3FF
4.0
2.0
0.5
0.125
MHz
MHz
MHz
MHz
Serial Interface, Digital Outputs MA, SLO, SLI
701 Vs(SLO)hi Saturation Voltage hi
Vs(SLO)hi = V(VDD) − V(),
I(SLO) = -4 mA
0.4
V
702 Vs(SLO)lo Saturation Voltage lo
I(SLO)lo = 4 mA, with reference to GND
0.4
V
703 Isc(SLO)hi Short-Circuit Current hi
V(SLO) = V(VDD), 25 °C
-60
-18 mA
704 Isc(SLO)lo Short-Circuit Current lo
V(SLO) = V(GND), 25 °C
18
60
mA
705 tr(SLO) Rise-Time
CL = 50 pF, rise 10 % to 90 %
60
ns
706 tf(SLO) Fall-Time
CL = 50 pF, fall 90 % to 10 %
60
ns
707 Vt()hi
Threshold Voltage hi at MA, SLI with reference to VND
2
V
708 Vt()lo
Threshold Voltage lo at MA, SLI with reference to VND
0.8
V
709 Vt()hys Threshold Hysteresis at MA, SLI
140 250
mV
710 Ipu(MA) Pull-up Current
V() = 0...VPD − 1 V
-60 -30
-6
µA
711 Ipd(SLI) Pull-down Current
V() = 1 V...VPD
6
30
60
µA
712 f(MA)
Permissible MA Clock Frequency
10 MHz
713 Ilk(SLO)tri Tristate Leakage Current
reversed supply
-20
20
µA
Ports P0, P1, P2, P3 and Test PTE
801 Vs()hi
Saturation Voltage hi at P0, P1, Vs()hi = V(VPD) − V(),
P2, P3
I() = -4 mA
0.4
V
802 Vs()lo
Saturation Voltage lo at P0, P1, I() = 4 mA, with reference to VND
P2, P3
0.4
V
803 tr()
Rise-Time at P0, P1, P2, P3
CL = 50 pF, rise 10 % to 90 %
60
ns
804 tf()
Fall-Time at P0, P1, P2, P3
CL = 50 pF, fall 90 % to 10 %
60
ns
805 Vt()hi
Threshold Voltage hi
with reference to VND
2
V
806 Vt()lo
Threshold Voltage lo
with reference to VND
0.8
V
807 Vt()hys Hysteresis
Vt()hys = Vt()hi − Vt()lo
140 250
mV
808 Ipd()
Pull-down Current
V() = 1 V...VPD
6
30
60
µA
Error Monitor NERR, NWARN
901 Vs()lo
Saturation Voltage lo at NERR I() = 4 mA , with reference to VND
0.4
V
902 Vt()hi
Input Threshold Voltage hi
with reference to VND
2
V
903 Vt()lo
Input Threshold Voltage lo
with reference to VND
0.8
V
904 Vt()hys Input Hysteresis
Vt()hys = Vt()hi − Vt()lo
140 250
mV
905 Ipu()
Pull-up Current Source at NERR V(NERR) = 0...VPD − 1 V
-800 -300 -80
µA
906 Isc()lo
Short-Circuit Current lo at NERR V(NERR) = V(VPD), Tj = 25°C
50
80
mA
907 tf()hilo
Delay Time at NERR
CL = 50 pF
60
ns
908 Ipu()
Pull-up Current at NWARN
V() = 0...VPD − 1 V
-60 -30
-6
µA