IC-MH16_15 Datasheet, PDF (23/25 Pages) IC-Haus GmbH – 12-BIT ANGULAR HALL ENCODER

iC-MH16
12-BIT ANGULAR HALL ENCODER
preliminary
Rev A1, Page 23/25
The register range 0x00..0x0F is equivalent to the set-
tings with which the IC can be parameterized. The set-
tings directly affect the corresponding switching parts.
The range 0x10..0x20 is read-only and reflects the
contents of the integrated zapping diodes. Following
programming the data can be verified via these ad-
dresses. After the supply voltage is connected, the
contents of the zapping diodes are copied to the RAM
area 0x00..0x0D and 0x7D..0x7F. Then the settings can
be overwritten via the serial interface. Overwriting is
not possible if the CFGPROT bit is set.
With the profile ID, the data format can be requested
for the following sensor data cycles in the module. A
read operation at address 0x42 results in 0x2C, which
is the equivalent to 12-bit single-cycle data. The ad-
dress 0x43 contains the number of significant singleturn
bits R_ST depending on the resolution. The registers
0x7D to 0x7F are reserved for the manufacturer and
can be provided with an ID so that the manufacturer
can identify its modules.
The port register at address 0x75 allows read and write
access to the ports P0 to P3. The reset value is 0x00.
DIRx
Addr. 0x75; bit 7:4
0x0
0
input
1
output
Table 31: Port Direction
The gain register at address 0x76 contains the actual
value of the amplitude control. This value multiplied
with GAING results in the complete gain.
GAIN(7:0)
0x00...0x08
...
0xF8...0xFF
Addr. 0x76; bit 7:0
1,098
exp(
ln(20)
256
·
GAINF)
18,213
Table 32: Hall signal amplification
The status register at address 0x77 provides informa-
tion on the status of the module. The information resets
after reading.
Internal Reset Function
A write access at RAM address 0x04..0x09 triggers an
internal reset.
Px
Addr. 0x75; bit 3:0
0x0
0
low
1
high
Table 30: Port Value
SERIAL INTERFACE: SSI protocol
In the SSI mode the absolute position is output with
13 bits according to the SSI standard. (The data is
transmitted as Gray code with trailing zeros.)
ENSSI
0
1
Addr. 0x05; bit 7
BiSS C
SSI
Table 33: Protocol version
Figure 24: SSI protocol, data GRAY-coded
Register transfer is not possible in SSI-Mode. The BiSS
mode must be forced by applying V(VZAP) = V()ZAP
before changing the value of bit ENSSI to avoid an
aborted register communication.
ERROR HANDLING
Errors in the module are signaled via the error message
output NERR. This open-drain output signals an error if
the output is pulled against VND. If the error condition
no longer exists, then the pin is released again after
a waiting time of approximately 1 ms. If the integrated
pull-up resistor is deactivated with DPU = 0x1, then an
external resistor must be provided. With DPU = 0x0 it
brings the pin up to the high level again.