IC-MH16_15 Datasheet, PDF (24/25 Pages) IC-Haus GmbH – 12-BIT ANGULAR HALL ENCODER

iC-MH16
12-BIT ANGULAR HALL ENCODER
preliminary
Rev A1, Page 24/25
DPU
0
1
Addr. 0x04; bit 6
Pull-up activated
Pull-up deactivated
Table 34: Activation of NERR pull-up
The status register provides information on the status
of the module. There are 5 different errors that can
be signaled. Following unsuccessful programming of
the zapping diodes, the bit PROGERR is set. If an
attempt is made to read the current position via the
serial interface during the start-up phase, an error is
signaled with ERRSDATA, as the actual position is not
yet known. The ERRAMAX bit is output to signal that
the amplitude is too high, while the ERRAMIN bit sig-
nals an amplitude which is too low, caused, for example,
by too great a distance to the magnet. If the NERR pin
is pulled against VND outside the module, this error is
also signaled via the serial interface. The ERREXT bit
is then equal to 0x1. The error bits are reset again after
the status register is read out at the address 0x77. The
error bit in the data word is then also read in the next
cycle as 0x0.
OTP PROGRAMMING
CFGPROT
0
1
Addr. 0x05; bit 6
no protection
write/read protection
Table 35: Write/read protection of configuration
ENHC
0
1
Addr. 0x0F; bit 7
Default setting
ZAP diode testing: Use a higher current for reading
the ZAP diodes memory (0x10-0x1F)
Table 36: Enable High Current
With CFGPROT = 0x0, the registers at the addresses
0x00..0x0F, 0x75 and 0x78..0x7F are readable and
writeable. The addresses 0x10..0x1F, 0x42..0x43 and
0x76..0x77 are read-only. With CFGPROT = 0x1,
all registers except the addresses 0x75 and 0x7C
are write-protected; the addresses 0x42..0x42 and
0x75..0x7F are readable, while all others are read-pro-
tected.
An internal programming algorithm for the ZAP diodes
is started by setting the bit PROGZAP. This process
can only be successful if the voltage at VZAP is greater
than 6.5 V and the test register TEST (2:0) is not set.
Following programming, the register is reset internally
again. In the process, the bit PROGOK is set in the
status register (address 0x77) when programming is
successful, and the bit PROGERR if it is not.
The ZAP memory can be tested by reading the reg-
ister range 0x10-0x20. This test can be done with a
higher readout current (bit ENHC = 0x1) to simulate
deteriorated working conditions.
For reliable ROM writing, a low impedance connection
path must be established for the VZAP blocking capac-
itor (about 100 nF) between pin VZAP and pin VNA2
to ensure stable VZAP voltage during programming. A
further capacitor of 10 µF which may be located exter-
nally (e.g. on the programming board) is recommended
for additional blocking purpose.
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