IC-MH16_15 Datasheet, PDF (10/25 Pages) IC-Haus GmbH – 12-BIT ANGULAR HALL ENCODER

iC-MH16
12-BIT ANGULAR HALL ENCODER
preliminary
OVERVIEW
Addr
Bit 7
Bit 6
Bit 5
Identification (0x78 bis 0x7B read-only)
0x78
0x79
0x7A
0x7B
0x7C
0x7D z
0x7E z
0x7F z
Rev A1, Page 10/25
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Device ID - 0x4D (’M’)
Device ID - 0x48 (’H’)
Revision - 0x67 (’g’)
Revision - 0x32 (’2’)
-
CFGTOS
Manufacturer Revision - 0x00
Manufacturer ID - 0x00
Manufacturer ID - 0x00
z: Register value programmable by zapping
p: Register value write protected; can only be changed while V(VZAP)> Vt()hi
Table 5: Register layout
Hall Signal Processing . . . . . . . . . . . . . . . . . . . . Page 12
GAING:
GAINF:
GCC:
ENF:
ENAC:
VOSS:
VOSC:
PRM:
CIBM:
DPU
Hall signal amplification range
Hall signal amplification (1–20,
log. scale)
Amplification calibration cosine
Enable filter
Activation of amplitude control
Offset calibration sine
Offset calibration cosine
Energy-saving mode
Calibration of bias current
Deactivation of NERR pull-up
RS422 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 20
CFGDR:
TRIHL:
CFGPROT:
ENSSI:
Driver property
Tristate high-side/low-side driver
Write/read protection memory
Activation of SSI mode
Sine/Digital Converter . . . . . . . . . . . . . . . . . . . . Page 18
CFGRES:
CFGZPOS:
CFGAB:
CFGSU:
CFGMTD:
CFGDIR:
CFGHYS:
CFGCOM:
DCS:
Resolution of sine digital converter
Zero point for position
Configuration of incremental output
Behavior during startup
Frequency at AB
Rotating direction reversal
Hysteresis sine/digital converter
No. of pole pairs for commutation
signals
Disable commutation synchronization
Test
TEST:
ENHC:
PROGZAP:
Test mode
Enable high current during ZAP diode
read
Activation of programming routine