IC-GD Datasheet, PDF (37/55 Pages) IC-Haus GmbH – UNIVERSAL I/O INTERFACE

iC-GD
UNIVERSAL I/O INTERFACE
preliminary
Possible mixed operating modes (primary and secondary function)
Rev A1, Page 37/55
Function
primary
Digital input
xxx
Digital output *
xxx
Voltage input
xx
x
x
Current input
xx
x
x
Voltage output
xx
x
x
Current output
xxx
Counter
xxx
PWM (*)
xxx
Thermo couples
xx
x
2, 3, 4-wire PTxxxx
(x) (**)
(*) The digital output can be digitally read back when operating as primary or sec-
ondary function. This is no mixed mode.
(**) When measuring PT, the iC automatically selects the current output as sec-
ondary function to provide the measuring current. Further use is not possible.
Table 22: Mixed operating modes
MONITORING
Voltage monitoring
The supply voltages VDA, VB, VNB, and VCC and the
internally generated voltages VPA and VPD are mon-
itored. If they fall below their respective thresholds,
the corresponding error bits are set. If the digital out-
and input is not used, VDA can also be supplied with
VDA = VB = 15 V to omit the 24 V supply. Here, the
bit VDA_VB must be set to avoid an alert of the VDA
monitor. Alternatively, the relevant interrupt generation
can be masked.
Chip-temperature measurement
The iC features a configurable internal 8-bit tempera-
ture-to-digital converter to measure the chip tempera-
ture. The temperature is available via SPI. The exact
chip temperature is also required for the current mea-
surement via a configuralbe internal resistor to account
for its TK. Both calibrations are carried out during the
chip production process and are stored internally (OTP).
They can be overwritten with a value from the external
EEPROM.
Overtemperature behavior
The iC features two-stage temperature monitoring.
When the shutdown temperature T1 is reached, the dig-
ital outputs, the current outputs, and the voltage outputs
are switched off if the relevant output cannot saturate
and therefore is responsible for the overtemperature.
When the shutdown temperature T2 is reached, all out-
puts are switched off. The outputs automatically restart,
when the chip temperature falls below the restart tem-
perature. The overtemperature detection T2 can be
deactivated for test purposes.
Register setting
The iC features three registers for general supervision:
The supervisory register (SPV_REG) indicates errors
at the voltage supplies, excessive chip temperature
and CRC errors at configuration or calibration. The two
channel-status registers (CH_STAT_REG) contain in-
formation on the functions in use on each channel and
the primary and secondary function. The interrupt reg-
ister (IRQ_FLAG_REG) is combinatorial and indicates
received interrupts. Enable registers allow masking of
individual status bits.
Once set, error bits stay set, even if the error does not
persist. The bits are reset during the reading of the
particular register (RD + RST). If the error persists, the
error bit is set again. If the transmission of individual
bits is deactivated by entries of the particular enable
register, the register is not touched. When the bits are
activated, also previosly occured errors are transmitted.
An overview is shown in Figure 7.