IC-GD Datasheet, PDF (3/55 Pages) IC-Haus GmbH – UNIVERSAL I/O INTERFACE

iC-GD
UNIVERSAL I/O INTERFACE
preliminary
PACKAGING INFORMATION QFN38 5 mm x 7 mm to JEDEC Standard
Rev A1, Page 3/55
PIN CONFIGURATION QFN38 5 mm x 7 mm
38 37 36 35 34 33 32
1
31
2
30
3
29
4
28
5
27
6
26
7
25
8
24
9
23
10
22
11
21
12
20
13 14 15 16 17 18 19
PIN FUNCTIONS
No. Name Function
1 ADR0 Address 0 input
2 ADR1 Address 1 input
3 ADR2 Address 2 input
4 VCC Supply voltage 3.3...5 V
5 GNDL Logic Ground
6 TEST Test pin
PIN FUNCTIONS
No. Name Function
7 VPD 5 V voltage output
8 VRPH Modulator mid voltage
9 VREF Modulator reference voltage
10 LED1 LED1 driver output
11 VNB Supply voltage -15 V
12 UN1 Voltage negative channel 1
13 UI1 Voltage current channel 1
14 UP1 Voltage positive channel 1
15 IA1 Current output analog/digital channel 1
16 GNDP Power Ground
17 VDA Supply voltage 24 V
18 IA2 Current output analog/digital channel 2
19 UP2 Voltage positive channel 2
20 UI2 Voltage current channel 2
21 UN2 Voltage negative channel 1
22 VB
Supply voltage +15 V
23 LED2 LED2 driver output
24 VPA 5 V voltage output
25 RP Resistor pin 1
26 RN Resistor pin 2
27 GNDA Analog Ground
28 NRES Reset input (low active)
29 RDY Ready output
30 NCS Chip select input (low active)
31 SCLK SPI clock input
32 SDI SPI data input
33 SDO SPI data output
34 SYNC1 Synchronization channel 1
35 SYNC2 Synchronization channel 2
36 IRQ Interrupt output
37 SCL Serial clock input
38 SDA Serial data input
The Thermal Pad is to be connected to a Ground Plane (GNDP) on the PCB.