IC-GD Datasheet, PDF (35/55 Pages) IC-Haus GmbH – UNIVERSAL I/O INTERFACE

iC-GD
UNIVERSAL I/O INTERFACE
preliminary
Rev A1, Page 35/55
• Pulse counter with reset: Counts pulses at CH_1.
CH_2 acts as reset input. While CH_2 is high, the
counter is reset.
• Pulse counter with gated signal: Counts pulses at
CH_1, if CH_2 is high.
• Pulse counter with direction signal: Counts pulses
at CH_1, positive for CH_2 = 0, negative for CH_2 =
1.
• Time measurement edge to edge between chan-
nel 1 and 2: Measures the time of the rising edge
at CH_1 to the rising edge at CH_2. In case of sev-
eral consecutive rising edges at CH_1, the last one
(minimum time) is measured. In case of several con-
secutive rising edges at CH_2, the time to the last
rising edge of CH_1 is measured. If both edges rise
simultaneously (within the sampling resolution), the
time to the preceding rising edge of CH_1 is mea-
sured, (i.e. not 0). CH_2 acts as synchronization
input, no external sync possible.
• Incremental encoder with single, dual and quadru-
ple evaluation.
Mode
Resolution LSB Maximum time
Time measurements
125 ns
537 s
PWM, HS mode
125 ns
8.192 ms
PWM, LS mode
16 µs
1.048 s
Table 20: Counter times
Mode
Pulse counter
Time measurement period
Time measurement pulse width
Pulse counter with trigger
Pulse counter with reset
Pulse counter with Gate
Pulse counter with direction signal
Time measurement CH1 → CH2
Incremental encoder 1 x
Incremental encoder 2 x
Incremental encoder 4 x
SYNC
X
-
-
-
X
X
X
-
X
X
X
CBE
X
-
-
X
X
X
X
-
-
-
-
DNU
X
-
-
X
X
X
-
-
-
-
-
RAR
X
(-)
(-)
X
X
X
X
(-)
(-)
(-)
(-)
DCB
X
X
X
X
X
X
X
X
X
X
X
Table 21: Overview of the usable counter setting bits