IC-MD Datasheet, PDF (10/23 Pages) IC-Haus GmbH – ENCODER RECEIVER/COUNTER WITH SPI AND BiSS

iC-MD RS-422 QUADRATURE
preliminary
ENCODER RECEIVER/COUNTER WITH SPI AND BiSS
RS-422, LVDS, TTL RECEIVERS
Rev A1, Page 10/23
The input stage for the incremental signals ABZ is con- ^LVDS
Addr. 0x03; bit (7)
0
figurable as single-ended TTL and differential (RS-422 ^Code
Function
or LVDS). Differential inputs are possible only for one 0
differential RS-422 inputs
counter configuration. If two or more counters are con- 1
differential LVDS inputs
figured, it must be used one of the TTL inputs configu- Notes
condition: TTL=0
ration shown in table 11.
Table 13: LVDS/RS-422 Inputs
Counters A0 B0 Z0 A1 B1 Z1 A2 B2
1xTTL AP AN BP - - - - -
2xTTL AP AN BP BN CP CN - -
3xTTL AP AN - BP BN - CP CN
Table 11: TTL Input Counters Configuration
The configuration bit EXCH exchanges the input A and
the input B of the counters. The default counting di-
rection is positive in clockwise (CW) direction (A edge
take place before B edge). But it is also possible to
change the counting direction with the register EXCH.
See table 14.
EXCH
Addr. 0x00; bit (5:3)
000
Note that the three counters configuration don’t imple- Code
Function
ment any Zero signal. It has only A and B input signals. xx1
exchange AB CNT0 (CCW positive)
Register bits TTL and LVDS set the configuration of the x1x
exchange AB CNT1 (CCW positive)
quadrature input signals.
1xx
exchange AB CNT2 (CCW positive)
TTL
Code
0
1
Addr. 0x01; bit (7)
Function
differential inputs
TTL inputs
Table 14: Exchange AB Inputs
0
The index (Z) signal can be inverted as shown in table
15 with the register bits INVZ(1:0).
Table 12: TTL Inputs
INVZ
Addr. 0x00; bit (7:6)
00
Code
Function
x1
invert Z CNT0 (Z=0 active)
It is possible to configure the differential input stage of ^1x
invert Z CNT1 (Z=0 active)
iC-MD in two different modes; differential RS-422 and
differential LVDS. See table 13.
Table 15: Invert Z Signal