GDC21D301A Datasheet, PDF (9/35 Pages) Hynix Semiconductor – Transport Decoder

GDC21D301A
Pin Description (continued)
NAME
\VID_WAIT
\VID_REQ
\VID_STRB
\VID_DCS
VAD_DATA[7:0]
PTS_DTS_STRB
BOF_V
\AUD_WAIT
\AUD_REQ
AUD_SER_DATA
\AUD_STRB
\AUD_DCS
BOF_A
PIN
TYPE
DESCRIPTION
VIDEO DECODER INTERFACE
95
I
Video Wait (active low).
This signal indicates that the access of registers in the video
decoder is ready.
96
I
Video Compressed Data Request (active low).
A video decoder requests video data from the GDC21D301A
by using this signal.
125
O Video Compressed Data Strobe (active low).
The signal indicates that the video data in VAD_DATA[7:0]
exists. The video decoder should latch the video data on the
rising edge of VID_STRB.
123
O Video Chip Select (active low).
This signal activates data transfers between the video decoder
and the host processor. Host processor can access the registers
of the video decoder.
110,114,115, I/O/Z Video/Audio Decoder Data.
116,117,119,
Parallel bit stream output of compressed audio, video, and
120,122
auxiliary data.
109
O Video PTS/DTS Strobe (active high).
When this signal is asserted High, the GDC21D301A puts PTS
(Presentation_Time_Stamp) or DTS (Decoding_Time_Stamp)
into VAD_DATA[7:0] bus.
99
I
Begin of Frame0.
On the rising edge of this signal, STC, the counted PCR value,
is copied to STC3_reg.
AUDIO DECODER INTERFACE
95
I
Audio Wait (active low).
This signal indicates that the access of registers in the audio
decoder is ready.
94
I
Audio Data Request (active low).
An audio decoder requests audio data from the GDC21D301A
by using this signal.
104
O Audio Serial Data.
105
O Audio Data Strobe (active low).
This signal indicates that audio data on VAD_DATA[7:0]
exists. \AUD_STRB signal can be used as the data clock for
serial and parallel data transmission. Thus, if output mode is
parallel, \AUD_STRB is 1-byte strobe. And if output mode is
serial, \AUD_STRB is 1-bit strobe.
103
O Audio Select (active low).
This signal activates data transfers between the audio decoder
and the host processor. Host processor should communicate
data with the audio decoder through the GDC21D301A.
98
I
Begin of Frame1.
On the rising edge of this signal, STC, the counted PCR_value,
is copied to STC3_reg.