GMS81004 Datasheet, PDF (74/101 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTERS

Chapter 5. Interrupt
5.7 Key Scan Input Processing
Key Scan Interrupt is generated by detecting low Input from each Input pin (R0, R1) or
standby(SLEEP, STOP) release signal. Key Scan ports are all 16bit which are
controlled by Stand-by Mode Release Register (SMRR0, SMRR1). Key Input is
considered as Interrupt, therefore, KSCNE bit of IEHN should be set for correct interrupt
executing, SLEEP mode and STOP mode, the rest of executing is the same as that of
external Interrupt. Each SMRR Register bit is allowed for each port(for Bit=0, no Key
Input, for Bit=1, Key Input available). At reset, SMRR becomes ¡È00H¡È. So, there is
no Key Input source.
7
SMRR0
0
W <00DCH>
R00
R01
.
.
R07
7
SMRR1
R0 port
Selection Logic
Internal
Key Scan
0
Interrupt
W <00DDH>
R10
R11
.
R1 port
.
Selection Logic
R17
<Key Scan Block>
5 -9