GMS81004 Datasheet, PDF (66/101 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTERS

Chapter 5. Interrupt
CHAPTER 5. INTERRUPT
The GMS810 Series contains 8 interrupt sources; 3 externals and 5 internals. Nested
interrupt services with priority control is also possible. Software interrupt is non-
maskable interrupt, the others are all maskable interrupts.
- 8 interrupt source (2Ext, 3Timer, BIT, WDT and Key Scan)
- 8 interrupt vector
- Nested interrupt control is possible
- Programmable interrupt mode
¡Ü Hardware accept mode
¡Ü Software selection accept mode
- Read and write of interrupt request flag are possible.
- In interrupt accept, request flag is automatically cleared.
Interrupt hardware consists of Interrupt Mode Register(MOD), Interrupt Enable Register
High (IENH), Interrupt Enable Register Low(IENL), Interrupt Request Register
High(IRQH), Interrupt Request Register Low(IRQL) and priority circuit. Interrupt function
block diagram is shown in Fig. 5.1
5.1 INTERRUPT SOURCE
Each interrupt vector is independent and has its own priority. Software interrupt(BRK) is
also available. Interrupt source classification is shown in Table 5.1
5 -1