GMS81004 Datasheet, PDF (63/101 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTERS

Chapter 4. Peripheral Hardware
4.2.4 Timer2
Timer2 operates as a up-counter. The content of T2DR are compared with the
contents of up-counter. If a match is found. Timer2 interrupt (IFT2) is generated
and the up-counter is cleared to ¡È00H¡È. Therefore, Timer2 executes as a
interval timer. Interrupt period is determined by the count source clock for the
Timer2 and content of T2DR.
When T2ST is set to 1, count value of Timer 2 is cleared and starts counting-
cup. For clearing and starting the Timer2. T2ST have to set to ¡È1¡È after set to
¡È0¡È. In order to write a value directly into the T2DR, T2ST should be set to
¡È0¡È. Count value of Timer2 can be read at any time.
T2 Data
Registers
Value
T2 Value
Concurrence
Concurrence
Concurrence
0
CLEAR
CLEAR
CLEAR
INTERRUPT
INTERRUPT
INTERRUPT
IFT0
Interval period
Fig. 4. 14 Operation of Timer2
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