GMS81004 Datasheet, PDF (43/101 Pages) Hynix Semiconductor – 8-BIT SINGLE CHIP MICROCOMPUTERS

Chapter 4. Peripheral Hardware
4.1.4.1 Control of B.I.T
If bit3(BTCL) of CKCTLR is set to ¡È1¡È, B.I.T is cleared, and then, after one machine
cycle, BTCL becomes ¡È0¡È, and B.I.T starts counting. BTCL is set to ¡È0¡È in reset
state.
7
CKCTLR
-
Clock Control Register
0
-
WDTON ENPCK BTCL
BTS2
BTS1
BTS0
W <00C7H>
BTCL
0
1
B.I.T Operation
free-run
Automatically cleared, after one cycle
4.1.4.2 Input Clock Selection of Basic Interval Timer
The input clock of B.I.T can be selected from the prescaler within a range of 2us to
256us by clock input selection bits(BTS2~BTS0). (at fex = 4MHz).
In reset state, or power on reset, BTS2=1, BTS1=1, BTS0=1 to secure the longest
oscillation stabilization time.
B.I.T can generate the wide range of basic interval time interrupt request(IFBIT) by
selecting prescaler output.
Interrupt interval can be selected to 8 kinds of interval time as shown in Table. 4.1.
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