HY5PS1G431CFP_08 Datasheet, PDF (38/45 Pages) Hynix Semiconductor – 1Gb DDR2 SDRAM

HY5PS1G4(8,16)31C(L)FP
HY5PS1G4(8,16)31CFR
19. tRPST end point and tRPRE begin point are not referenced to a specific voltage level but specify when
the device output is no longer driving (tRPST), or begins driving (tRPRE). Below figure shows a method to
calculate these points when the device is no longer driving (tRPST), or begins driving (tRPRE). Below Fig-
ure shows a method to calculate these points when the device is no longer driving (tRPST), or begins driv-
ing (tRPRE) by measuring the signal at two different voltages. The actual voltage measurement points are
not critical as long as the calculation is consistent.
tHZ
tRPST end point
T1
VOH + xmV
VOH + 2xmV
T2
VOL + 1xmV
VOL + 2xmV
tHZ , tRPST end point = 2*T1-T2
VTT + 2xmV
VTT + xmV
T1
VTT -xmV
tLZ
tRPRE begin point
VTT - 2xmV
T2
tLZ , tRPRE begin point = 2*T1-T2
20. Input waveform timing with differential data strobe enabled MR[bit10] =0, is referenced from the input
signal crossing at the V_IH(ac) level to the differential data strobe crosspoint for a rising signal, and from
the input signal crossing at the V_IL(ac) level to the differential data strobe crosspoint for a falling signal
applied to the device under test.
21. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input
signal crossing at the V_IH(dc) level to the differential data strobe crosspoint for a rising signal and V_IL(dc)
to the differential data strobe crosspoint for a falling signal applied to the device under test.
Differential Input waveform timing
DQS
DQS
tDS tDH
tDS tDH
VDDQ
VIH(ac)min
VIH(dc)min
VREF(dc)
VIL(dc)max
VIL(ac)max
VSS
Rev. 0.7 / Nov. 2008
38