HY5PS1G431CFP_08 Datasheet, PDF (14/45 Pages) Hynix Semiconductor – 1Gb DDR2 SDRAM

3.2.4 Differential Input AC logic Level
HY5PS1G4(8,16)31C(L)FP
HY5PS1G4(8,16)31CFR
Symbol
Parameter
V_ID (ac) _{ac differential input voltage}
V_IX (ac) _{ac differential cross point voltage}
Min.
0.5
0.5 * VDDQ - 0.175
Max.
VDDQ + 0.6
0.5 * VDDQ + 0.175
Units Notes
V
1
V
2
Note:
1. VIN(DC) specifies the allowable DC execution of each input of differential pair such as CK, CK, DQS, DQS, LDQS,
LDQS, UDQS and UDQS.
2. VID(DC) specifies the input differential voltage |VTR -VCP | required for switching, where VTR is the true input
(such as CK, DQS, LDQS or UDQS) level and VCP is the complementary input (such as CK, DQS, LDQS or UDQS)
level.
The minimum value is equal to VIH(DC) - V IL(DC).
V_TR
V_CP
V_DDQ
V_ID
Crossing point
V_{IX or} V_OX
V_SSQ
< Differential signal levels >
Note:
1. VID(AC) specifies the input differential voltage |VTR -VCP | required for switching, where VTR is the true input sig-
nal
(such as CK, DQS, LDQS or UDQS) and VCP is the complementary input signal (such as CK, DQS, LDQS or UDQS).
The minimum value is equal to V IH(AC) - V IL(AC).
2. The typical value of VIX(AC) is expected to be about 0.5 * VDDQ of the transmitting device and VIX(AC) is
expected to track variations in VDDQ. VIX(AC) indicates the voltage at which differential input signals must cross.
3.2.5 Differential AC output parameters
Symbol
Parameter
V_OX (ac) _{ac differential cross point voltage}
Min.
Max.
Units Notes
0.5 * VDDQ - 0.125 0.5 * VDDQ + 0.125 V
1
Note:
1. The typical value of VOX(AC) is expected to be about 0.5 * V DDQ of the transmitting device and VOX(AC) is
expected to track variations in VDDQ. VOX(AC) indicates the voltage at XIJDI differential output signals must
cross.
Rev. 0.7 / Nov. 2008
14