HY5PS1G431CFP_08 Datasheet, PDF (22/45 Pages) Hynix Semiconductor – 1Gb DDR2 SDRAM

HY5PS1G4(8,16)31C(L)FP
HY5PS1G4(8,16)31CFR
4. Electrical Characteristics & AC Timing Specification
(T_OPER
V_DDQ = 1.8 +/- 0.1V; V_DD = 1.8 +/- 0.1V)
Refresh Parameters by Device Density
Parameter
Refresh to Active/Refresh
command time
Symbol
tRFC
256Mb 512Mb 1Gb 2Gb 4Gb Units Notes
75 105 127.5 195 327.5 ns 1
Average periodic
refresh interval
0 † T_CASE †
85 _7.8
tREFI
85ģ T_CASE †
 _3.9
7.8 7.8 7.8 7.8 us 1
3.9 3.9 3.9 3.9 us 1,2
Note:
1: If refresh timing is violated, data corruption may occur and the data must be re-written with valid data before a valid READ can be
executed.
2. This is an optional feature. For detailed information, please refer to “operating temperature condition” in this data sheet.
DDR2 SDRAM speed bins and tRCD, tRP and tRC for corresponding bin
Speed
Parameter
Bin(CL-tRCD-tRP)
CAS Latency
tRCD
tRP^*1
tRAS
tRC
DDR2-800
min
min
5-5-5
6-6-6
5
6
12.5
15
12.5
15
45
45
57.5
60
DDR2-667
min
min
4-4-4
5-5-5
4
5
12
15
12
15
45
45
57
60
DDR2-533 DDR2-400 Units Notes
min
min
4-4-4
3-3-3
4
3
tCK
15
15
ns
2
15
15
ns
2
45
40
ns 2,3
60
55
ns
2
Note:
1. 8 bank device Precharge All Allowance: tRP for a Precharge All command for an 8 Bank device will equal to tRP+1*tCK, where tRP
are the values for a single bank 1SFDIBSHF, which are shown in the table above.
2. Refer to Specific Notes 32.
3. Refer to Specific Notes 3.
Rev. 0.7 / Nov. 2008
22