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HMC701LP6CE Datasheet, PDF (13/46 Pages) Hittite Microwave Corporation – 8 GHz 16-Bit Fractional-N Synthesizer
v03.0709
HMC701LP6CE
8 GHz 16-Bit Fractional-N Synthesizer
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Figure 14. gpo_04 Outputs
Mirror of VCO Port Data, Clock, Latch Enable (gpo_sel=5)
Setting register gpo_sel=5 (Reg1Bh <3:0> Table 37) mirrors the output of the VCO SP on the gpo pins.
Δ∑ Modulator Phase Accumulator (gpo_sel=6)
Setting register gpo_sel=6 (Reg1Bh<3:0> Table 37) assigns the three msb’s of the delta sigma modulator first
accumulator to GPO<3:1> , where GPO3 is the msb. This feature provides insight into the phase of the VCO.
Auxiliary Oscillators (gpo_sel=7)
Setting register gpo_sel=7 (Reg1Bh<3:0> Table 37) assigns an auxiliary clock, an internal ring oscillator, and the
internal sigma delta clock to GPO3, 2, 1 respectively. The control of the auxiliary clock is determined by Reg18h Table
34 and Reg19h Table 35. In general terms, this highly flexible clock source allows the selection of one of the various
VCO or crystal related clocks inside the synthesizer or the selection of a flexible unstabilized auxiliary ring oscillator
clock. Any of the sources may be routed out via gpo_sel=7. Additional Reg18h Table 34 clock controls allow the aux
clock to be delayed by a variable amount (auxclk_modesel Reg18h<3:2>), or to be divided down by even values from
2 to 14 (auxclk_divsel Reg18h<6:4>).
Auto Calibration Busy Flag (gpo_sel=8)
Setting register gpo_sel=8 (Reg1B<3:0> Table 37) assigns a “vco calibration busy flag” to GPO1. This output will be
high while the auto calibration is running.
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