HD66420 Datasheet, PDF (46/52 Pages) Hitachi Semiconductor – (RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD)

HD66420
R8
R9
R10
Data bit
Set value
Set value
Set value
7
6
5
4
3
2
1
0
BK0 BK1 BK2 BK3 BK4 BK5 BK6 BK7
BK8 BK9 BK10 BK11 BK12 BK13 BK14 BK15
BK16 BK17 BK18 BK19
Figure 34 Blink Registers (R8, R9, R10)
Data bit
Set value
7
6
5
4
3
2
1
0
PB3 PB2 PB1 PB0
Set value
H’00
H’01
H’02
H’03
H’04
Row no.
COM1 to COM8
COM9 to COM16
COM17 to COM24
COM25 to COM32
COM33 to COM40
Set value
H’05
H’06
H’07
H’08
H’09
Row no.
COM80 to COM73
COM72 to COM65
COM64 to COM57
COM56 to COM49
COM48 to COM41
(ADC= “0”. If “1” ,
reverse direction)
Figure 35 Partial Display Start Raster Register (R11)
Data bit
7
6
5
4
3
2
1
0
R12
R13
R14
R15
Set value
Set value
Set value
Set value
GP14 GP13 GP12 GP11 GP10
GP24 GP23 GP22 GP21 GP20
GP34 GP33 GP32 GP31 GP30
GP44 GP43 GP42 GP41 GP40
Figure 36 Grayscale Palette Registers (R12 to R15)
Contrast Control and LCD Alternative Drive Cycle Register (R16): The contrast control register
(figure 37) designates the contrast level of LCD display. These bits change the voltage which is supplied to
LCD drivers.
The LCD alternative drive cycle register designates the number of lines that LCD drive outputs are
alternated.
Data bits 7 is unused; they should be set to 0 when written to.
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