HD66420 Datasheet, PDF (25/52 Pages) Hitachi Semiconductor – (RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD)

HD66420
Display RAM Reading by LCD Controller:
Data is read by the HD66420 to be displayed asynchronously with accesses by the MPU. However, because
simultaneous access could damage data in the display RAM, the HD66420 internally arbitrates access
timing; access by the MPU usually has priority and so access by the HD66420 is placed between accesses
by the MPU. Accordingly, an appropriate time must be secured (see the given electrical characteristics
between two accesses by the MPU).
H’0
H’00
H’01
H’4F
H’1
Valid area
H’27 H’28
H’35
Valid area (WLS= 1)
H’7F
Invalid area
WLS= 0
a) INC = 0
Invalid area
WLS= 1
H’0
H’1
H’00
H’01
WLS= 0
H’02
H’27
H’28
WLS= 1
H’35
H’4F
WLS= 0
b) INC = 1
WLS= 1
Figure 13 Display Address Increment
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